src/llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ceil-floor.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s
# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s

---
name:            ceil_f32
body:             |
  bb.1:
    liveins: $f10_f

    ; CHECK-LABEL: name: ceil_f32
    ; CHECK: liveins: $f10_f
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
    ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
    ; CHECK-NEXT: $f10_f = COPY [[COPY]](s32)
    ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &ceilf, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_f, implicit-def $f10_f
    ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f10_f
    ; CHECK-NEXT: $f10_f = COPY [[COPY1]](s32)
    ; CHECK-NEXT: PseudoRET implicit $f10_f
    %0:_(s32) = COPY $f10_f
    %1:_(s32) = G_FCEIL %0
    $f10_f = COPY %1(s32)
    PseudoRET implicit $f10_f

...
---
name:            floor_f32
body:             |
  bb.1:
    liveins: $f10_f

    ; CHECK-LABEL: name: floor_f32
    ; CHECK: liveins: $f10_f
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
    ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
    ; CHECK-NEXT: $f10_f = COPY [[COPY]](s32)
    ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &floorf, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_f, implicit-def $f10_f
    ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f10_f
    ; CHECK-NEXT: $f10_f = COPY [[COPY1]](s32)
    ; CHECK-NEXT: PseudoRET implicit $f10_f
    %0:_(s32) = COPY $f10_f
    %1:_(s32) = G_FFLOOR %0
    $f10_f = COPY %1(s32)
    PseudoRET implicit $f10_f

...
---
name:            ceil_f64
body:             |
  bb.1:
    liveins: $f10_d

    ; CHECK-LABEL: name: ceil_f64
    ; CHECK: liveins: $f10_d
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
    ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
    ; CHECK-NEXT: $f10_d = COPY [[COPY]](s64)
    ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &ceil, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_d, implicit-def $f10_d
    ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $f10_d
    ; CHECK-NEXT: $f10_d = COPY [[COPY1]](s64)
    ; CHECK-NEXT: PseudoRET implicit $f10_d
    %0:_(s64) = COPY $f10_d
    %1:_(s64) = G_FCEIL %0
    $f10_d = COPY %1(s64)
    PseudoRET implicit $f10_d

...
---
name:            floor_f64
body:             |
  bb.1:
    liveins: $f10_d

    ; CHECK-LABEL: name: floor_f64
    ; CHECK: liveins: $f10_d
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
    ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
    ; CHECK-NEXT: $f10_d = COPY [[COPY]](s64)
    ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &floor, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_d, implicit-def $f10_d
    ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $f10_d
    ; CHECK-NEXT: $f10_d = COPY [[COPY1]](s64)
    ; CHECK-NEXT: PseudoRET implicit $f10_d
    %0:_(s64) = COPY $f10_d
    %1:_(s64) = G_FFLOOR %0
    $f10_d = COPY %1(s64)
    PseudoRET implicit $f10_d

...