| //===-- RISCVInstrGISel.td - RISC-V GISel target pseudos ----*- tablegen -*-===// |
| // |
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| // See https://llvm.org/LICENSE.txt for license information. |
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| /// \file |
| // RISC-V GlobalISel target pseudo instruction definitions. This is kept |
| // separately from the other tablegen files for organizational purposes, but |
| // share the same infrastructure. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| class RISCVGenericInstruction : GenericInstruction { |
| let Namespace = "RISCV"; |
| } |
| |
| // Pseudo equivalent to a RISCVISD::FCLASS. |
| def G_FCLASS : RISCVGenericInstruction { |
| let OutOperandList = (outs type0:$dst); |
| let InOperandList = (ins type1:$src); |
| let hasSideEffects = false; |
| } |
| def : GINodeEquiv<G_FCLASS, riscv_fclass>; |