src/llvm-project/llvm/test/CodeGen/Thumb2/bti-jump-table.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc < %s -x mir -mtriple=thumbv7m-arm-none-eabi -run-pass=arm-branch-targets | FileCheck %s
--- |
  define internal i32 @table_switch(i32 %x) {
  entry:
    switch i32 %x, label %sw.epilog [
      i32 1, label %return
      i32 2, label %bb2
      i32 3, label %bb3
      i32 4, label %bb4
    ]

  bb2:
    br label %return

  bb3:
    br label %return

  bb4:
    br label %return

  sw.epilog:
    br label %return

  return:
    %ret = phi i32 [ 0, %sw.epilog ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 1, %entry ]
    ret i32 %ret
  }

  !llvm.module.flags = !{!0}
  !0 = !{i32 8, !"branch-target-enforcement", i32 1}

...
---
name:            table_switch
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0' }
frameInfo:
  maxAlignment:    1
  maxCallFrameSize: 0
machineFunctionInfo: {}
jumpTable:
  kind:            inline
  entries:
    - id:              0
      blocks:          [ '%bb.6', '%bb.2', '%bb.3', '%bb.4' ]
body:             |
  ; CHECK-LABEL: name: table_switch
  ; CHECK: bb.0.entry:
  ; CHECK:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; CHECK:   liveins: $r0
  ; CHECK:   renamable $r1, dead $cpsr = tSUBi3 killed renamable $r0, 1, 14 /* CC::al */, $noreg
  ; CHECK:   tCMPi8 renamable $r1, 3, 14 /* CC::al */, $noreg, implicit-def $cpsr
  ; CHECK:   t2Bcc %bb.3, 8 /* CC::hi */, killed $cpsr
  ; CHECK: bb.1.entry:
  ; CHECK:   successors: %bb.4(0x20000000), %bb.2(0x20000000), %bb.5(0x20000000), %bb.6(0x20000000)
  ; CHECK:   liveins: $r1
  ; CHECK:   renamable $r0, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $r2 = t2LEApcrelJT %jump-table.0, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $r2 = t2ADDrs killed renamable $r2, renamable $r1, 18, 14 /* CC::al */, $noreg, $noreg
  ; CHECK:   t2BR_JT killed renamable $r2, killed renamable $r1, %jump-table.0
  ; CHECK: bb.2.bb2:
  ; CHECK:   renamable $r0, dead $cpsr = tMOVi8 2, 14 /* CC::al */, $noreg
  ; CHECK:   tBX_RET 14 /* CC::al */, $noreg, implicit $r0
  ; CHECK: bb.3.sw.epilog:
  ; CHECK:   successors: %bb.4(0x80000000)
  ; CHECK:   renamable $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
  ; CHECK: bb.4.return:
  ; CHECK:   liveins: $r0
  ; CHECK:   tBX_RET 14 /* CC::al */, $noreg, implicit $r0
  ; CHECK: bb.5.bb3:
  ; CHECK:   renamable $r0, dead $cpsr = tMOVi8 3, 14 /* CC::al */, $noreg
  ; CHECK:   tBX_RET 14 /* CC::al */, $noreg, implicit $r0
  ; CHECK: bb.6.bb4:
  ; CHECK:   renamable $r0, dead $cpsr = tMOVi8 4, 14 /* CC::al */, $noreg
  ; CHECK:   tBX_RET 14 /* CC::al */, $noreg, implicit $r0
  bb.0.entry:
    successors: %bb.5, %bb.1
    liveins: $r0

    renamable $r1, dead $cpsr = tSUBi3 killed renamable $r0, 1, 14 /* CC::al */, $noreg
    tCMPi8 renamable $r1, 3, 14 /* CC::al */, $noreg, implicit-def $cpsr
    t2Bcc %bb.5, 8 /* CC::hi */, killed $cpsr

  bb.1.entry:
    successors: %bb.6, %bb.2, %bb.3, %bb.4
    liveins: $r1

    renamable $r0, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
    renamable $r2 = t2LEApcrelJT %jump-table.0, 14 /* CC::al */, $noreg
    renamable $r2 = t2ADDrs killed renamable $r2, renamable $r1, 18, 14 /* CC::al */, $noreg, $noreg
    t2BR_JT killed renamable $r2, killed renamable $r1, %jump-table.0

  bb.2.bb2:
    renamable $r0, dead $cpsr = tMOVi8 2, 14 /* CC::al */, $noreg
    tBX_RET 14 /* CC::al */, $noreg, implicit $r0

  bb.5.sw.epilog:
    renamable $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg

  bb.6.return:
    liveins: $r0

    tBX_RET 14 /* CC::al */, $noreg, implicit $r0

  bb.3.bb3:
    renamable $r0, dead $cpsr = tMOVi8 3, 14 /* CC::al */, $noreg
    tBX_RET 14 /* CC::al */, $noreg, implicit $r0

  bb.4.bb4:
    renamable $r0, dead $cpsr = tMOVi8 4, 14 /* CC::al */, $noreg
    tBX_RET 14 /* CC::al */, $noreg, implicit $r0

...