| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -verify-machineinstrs -mtriple riscv64 -run-pass=postrapseudos %s -o - | FileCheck %s |
| |
| ... |
| --- |
| name: copy_different_lmul |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16 |
| ; 82 = e32,m4 |
| ; CHECK-LABEL: name: copy_different_lmul |
| ; CHECK: liveins: $x14, $x16 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v12m2 = VMV2R_V $v28m2 |
| $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype |
| $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $v12m2 = COPY $v28m2 |
| ... |
| --- |
| name: copy_convert_to_vmv_v_v |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16 |
| ; 82 = e32,m4 |
| ; CHECK-LABEL: name: copy_convert_to_vmv_v_v |
| ; CHECK: liveins: $x14, $x16 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v12m4 = PseudoVMV_V_V_M4 undef $v12m4, $v28m4, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype |
| $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $v12m4 = COPY $v28m4 |
| ... |
| --- |
| name: copy_convert_to_vmv_v_i |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14 |
| ; 82 = e32,m4 |
| ; CHECK-LABEL: name: copy_convert_to_vmv_v_i |
| ; CHECK: liveins: $x14 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v28m4 = PseudoVMV_V_I_M4 undef $v28m4, 0, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v12m4 = PseudoVMV_V_I_M4 undef $v12m4, 0, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype |
| $v28m4 = PseudoVMV_V_I_M4 undef $v28m4, 0, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $v12m4 = COPY $v28m4 |
| ... |
| --- |
| name: copy_from_whole_load_store |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16 |
| ; 82 = e32,m4 |
| ; CHECK-LABEL: name: copy_from_whole_load_store |
| ; CHECK: liveins: $x14, $x16 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v28m4 = VL4RE32_V $x16 |
| ; CHECK-NEXT: $v12m4 = VMV4R_V $v28m4 |
| $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype |
| $v28m4 = VL4RE32_V $x16 |
| $v12m4 = COPY $v28m4 |
| ... |
| --- |
| name: copy_with_vleff |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16 |
| ; 82 = e32,m4 |
| ; CHECK-LABEL: name: copy_with_vleff |
| ; CHECK: liveins: $x14, $x16 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v28m4 = PseudoVMV_V_I_M4 undef $v28m4, 0, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v4m4, $x0 = PseudoVLE32FF_V_M4 undef $v4m4, $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit-def $vl |
| ; CHECK-NEXT: $v12m4 = VMV4R_V $v28m4 |
| $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype |
| $v28m4 = PseudoVMV_V_I_M4 undef $v28m4, 0, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $v4m4,$x0 = PseudoVLE32FF_V_M4 undef $v4m4, $x16, $noreg, 5, 0, implicit-def $vl |
| $v12m4 = COPY $v28m4 |
| ... |
| --- |
| name: copy_with_vsetvl_x0_x0_1 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16, $x17, $x18 |
| ; 82 = e32,m4 |
| ; 73 = e16,m2 |
| ; CHECK-LABEL: name: copy_with_vsetvl_x0_x0_1 |
| ; CHECK: liveins: $x14, $x16, $x17, $x18 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x17, 73 /* e16, m2, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $x0 = PseudoVSETVLIX0 $x0, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v4m4 = PseudoVLE32_V_M4 undef $v4m4, killed $x18, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v12m4 = VMV4R_V $v28m4 |
| $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype |
| $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $x15 = PseudoVSETVLI $x17, 73, implicit-def $vl, implicit-def $vtype |
| $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4, 0, implicit $vl, implicit $vtype |
| $x0 = PseudoVSETVLIX0 $x0, 82, implicit-def $vl, implicit-def $vtype |
| $v4m4 = PseudoVLE32_V_M4 undef $v4m4, killed $x18, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $v12m4 = COPY $v28m4 |
| ... |
| --- |
| name: copy_with_vsetvl_x0_x0_2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16, $x17, $x18 |
| ; 82 = e32,m4 |
| ; 73 = e16,m2 |
| ; CHECK-LABEL: name: copy_with_vsetvl_x0_x0_2 |
| ; CHECK: liveins: $x14, $x16, $x17, $x18 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $x0 = PseudoVSETVLIX0 $x0, 73 /* e16, m2, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $x0 = PseudoVSETVLIX0 $x0, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v4m4 = PseudoVLE32_V_M4 undef $v4m4, killed $x18, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v12m4 = PseudoVMV_V_V_M4 undef $v12m4, $v28m4, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype |
| $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $x0 = PseudoVSETVLIX0 $x0, 73, implicit-def $vl, implicit-def $vtype |
| $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4, 0, implicit $vl, implicit $vtype |
| $x0 = PseudoVSETVLIX0 $x0, 82, implicit-def $vl, implicit-def $vtype |
| $v4m4 = PseudoVLE32_V_M4 undef $v4m4, killed $x18, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $v12m4 = COPY $v28m4 |
| ... |
| --- |
| name: copy_with_vsetvl_x0_x0_3 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16, $x17, $x18 |
| ; 82 = e32,m4 |
| ; 73 = e16,m2 |
| ; CHECK-LABEL: name: copy_with_vsetvl_x0_x0_3 |
| ; CHECK: liveins: $x14, $x16, $x17, $x18 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $x0 = PseudoVSETVLIX0 $x0, 73 /* e16, m2, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v12m4 = VMV4R_V $v28m4 |
| $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype |
| $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $x0 = PseudoVSETVLIX0 $x0, 73, implicit-def $vl, implicit-def $vtype |
| $v0m2 = PseudoVLE32_V_M2 undef $v0m2, $x18, $noreg, 4, 0, implicit $vl, implicit $vtype |
| $v12m4 = COPY $v28m4 |
| ... |
| --- |
| name: copy_subregister |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x16, $x17 |
| ; 73 = e16,m2 |
| ; CHECK-LABEL: name: copy_subregister |
| ; CHECK: liveins: $x16, $x17 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETIVLI 4, 73 /* e16, m2, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v26m2 = PseudoVLE16_V_M2 undef $v26m2, killed $x16, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v8m2 = PseudoVLE16_V_M2 undef $v8m2, killed $x17, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: early-clobber $v28m4 = PseudoVWADD_VV_M2 undef $v28m4, $v26m2, $v8m2, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v12m2 = VMV2R_V $v28m2 |
| $x15 = PseudoVSETIVLI 4, 73, implicit-def $vl, implicit-def $vtype |
| $v26m2 = PseudoVLE16_V_M2 undef $v26m2, killed $x16, $noreg, 4, 0, implicit $vl, implicit $vtype |
| $v8m2 = PseudoVLE16_V_M2 undef $v8m2, killed $x17, $noreg, 4, 0, implicit $vl, implicit $vtype |
| |
| $v28m4 = PseudoVWADD_VV_M2 undef $v28m4, $v26m2, $v8m2, $noreg, 4, 0, implicit $vl, implicit $vtype |
| $v12m2 = COPY $v28m2 |
| ... |
| --- |
| name: copy_with_different_vlmax |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16 |
| ; 82 = e32,m4 |
| ; 74 = e16,m4 |
| ; CHECK-LABEL: name: copy_with_different_vlmax |
| ; CHECK: liveins: $x14, $x16 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82 /* e32, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $x0 = PseudoVSETVLIX0 $x0, 74 /* e16, m4, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v12m4 = VMV4R_V $v28m4 |
| $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype |
| $v28m4 = PseudoVLE32_V_M4 undef $v28m4, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $x0 = PseudoVSETVLIX0 $x0, 74, implicit-def $vl, implicit-def $vtype |
| $v12m4 = COPY $v28m4 |
| ... |
| --- |
| name: copy_with_widening_reduction |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x10, $v8, $v26, $v27 |
| ; CHECK-LABEL: name: copy_with_widening_reduction |
| ; CHECK: liveins: $x10, $v8, $v26, $v27 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x11 = PseudoVSETIVLI 1, 64 /* e8, m1, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v8 = PseudoVWREDSUM_VS_M1_E8 killed renamable $v8, killed renamable $v26, killed renamable $v27, 1, 3 /* e8 */, 1 /* ta, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v26 = VMV1R_V killed $v8 |
| ; CHECK-NEXT: $x10 = PseudoVSETVLI killed renamable $x10, 75 /* e16, m8, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v8m8 = VL8RE8_V killed $x10 |
| $x11 = PseudoVSETIVLI 1, 64, implicit-def $vl, implicit-def $vtype |
| $v8 = PseudoVWREDSUM_VS_M1_E8 killed renamable $v8, killed renamable $v26, killed renamable $v27, 1, 3, 1, implicit $vl, implicit $vtype |
| $v26 = COPY killed renamable $v8 |
| $x10 = PseudoVSETVLI killed renamable $x10, 75, implicit-def $vl, implicit-def $vtype |
| $v8m8 = VL8RE8_V killed $x10 |
| ... |
| --- |
| name: copy_zvlsseg_reg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16 |
| ; 80 = e32,m1 |
| ; CHECK-LABEL: name: copy_zvlsseg_reg |
| ; CHECK: liveins: $x14, $x16 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 80 /* e32, m1, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v8_v9 = PseudoVLSEG2E32_V_M1 undef $v8_v9, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v10 = VMV1R_V $v8 |
| $x15 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype |
| $v8_v9 = PseudoVLSEG2E32_V_M1 undef $v8_v9, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $v10 = COPY $v8 |
| ... |
| --- |
| name: copy_zvlsseg_reg_2 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16 |
| ; 80 = e32,m1 |
| ; CHECK-LABEL: name: copy_zvlsseg_reg_2 |
| ; CHECK: liveins: $x14, $x16 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 80 /* e32, m1, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v8_v9 = PseudoVLSEG2E32_V_M1 undef $v8_v9, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v10 = PseudoVMV_V_V_M1 undef $v10, $v8, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v11 = PseudoVMV_V_V_M1 undef $v11, $v9, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| $x15 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype |
| $v8_v9 = PseudoVLSEG2E32_V_M1 undef $v8_v9, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $v10_v11 = COPY $v8_v9 |
| ... |
| --- |
| name: copy_fractional_lmul |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x14, $x16 |
| ; 87 = e32,mf2 |
| ; CHECK-LABEL: name: copy_fractional_lmul |
| ; CHECK: liveins: $x14, $x16 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 87 /* e32, mf2, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v28 = PseudoVLE32_V_MF2 undef $v28, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v12 = VMV1R_V $v28 |
| $x15 = PseudoVSETVLI $x14, 87, implicit-def $vl, implicit-def $vtype |
| $v28 = PseudoVLE32_V_MF2 undef $v28, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $v12 = COPY $v28 |
| ... |
| --- |
| name: copy_implicit_def |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x12, $x14, $x16 |
| ; 80 = e32,m1 |
| ; CHECK-LABEL: name: copy_implicit_def |
| ; CHECK: liveins: $x12, $x14, $x16 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x0 = PseudoVSETVLI $x14, 80 /* e32, m1, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v8_v9_v10_v11_v12_v13_v14_v15 = PseudoVLSEG8E32_V_M1 undef $v8_v9_v10_v11_v12_v13_v14_v15, killed $x12, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $x0 = PseudoVSETIVLI 10, 80 /* e32, m1, ta, mu */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v15 = PseudoVLE32_V_M1 undef $v15, killed $x16, $noreg, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype, implicit killed $v8_v9_v10_v11_v12_v13_v14_v15, implicit-def $v8_v9_v10_v11_v12_v13_v14_v15 |
| ; CHECK-NEXT: $v24 = VMV1R_V killed $v8 |
| ; CHECK-NEXT: $v25 = VMV1R_V killed $v9 |
| ; CHECK-NEXT: $v26 = VMV1R_V killed $v10 |
| ; CHECK-NEXT: $v27 = VMV1R_V killed $v11 |
| ; CHECK-NEXT: $v28 = VMV1R_V killed $v12 |
| ; CHECK-NEXT: $v29 = VMV1R_V killed $v13 |
| ; CHECK-NEXT: $v30 = VMV1R_V killed $v14 |
| ; CHECK-NEXT: $v31 = VMV1R_V killed $v15 |
| $x0 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype |
| $v8_v9_v10_v11_v12_v13_v14_v15 = PseudoVLSEG8E32_V_M1 undef $v8_v9_v10_v11_v12_v13_v14_v15, killed $x12, $noreg, 5, 0, implicit $vl, implicit $vtype |
| $x0 = PseudoVSETIVLI 10, 80, implicit-def $vl, implicit-def $vtype |
| $v15 = PseudoVLE32_V_M1 undef $v15, killed $x16, $noreg, 5, 0, implicit $vl, implicit $vtype, implicit killed $v8_v9_v10_v11_v12_v13_v14_v15, implicit-def $v8_v9_v10_v11_v12_v13_v14_v15 |
| $v24_v25_v26_v27_v28_v29_v30_v31 = COPY killed $v8_v9_v10_v11_v12_v13_v14_v15 |
| ... |
| --- |
| name: copy_narrow_copies_in_between |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x10, $x11, $v8, $v9 |
| ; CHECK-LABEL: name: copy_narrow_copies_in_between |
| ; CHECK: liveins: $x10, $x11, $v8, $v9 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x0 = PseudoVSETVLI $x10, 201 /* e16, m2, ta, ma */, implicit-def $vl, implicit-def $vtype |
| ; CHECK-NEXT: $v10m2 = PseudoVLE16_V_M2 undef $v10m2, killed $x11, $noreg, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
| ; CHECK-NEXT: $v10 = VMV1R_V $v8 |
| ; CHECK-NEXT: $v11 = VMV1R_V $v9 |
| ; CHECK-NEXT: $v12m2 = VMV2R_V $v10m2 |
| $x0 = PseudoVSETVLI $x10, 201, implicit-def $vl, implicit-def $vtype |
| $v10m2 = PseudoVLE16_V_M2 undef $v10m2, killed $x11, $noreg, 4, 0, implicit $vl, implicit $vtype |
| $v10 = COPY $v8 |
| $v11 = COPY $v9 |
| $v12m2 = COPY $v10m2 |
| ... |
