src/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-align.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=gfx90a -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - | FileCheck %s

---
name:            assert_align_vgpr
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: assert_align_vgpr
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %copy:vgpr(p1) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: %assert_align:vgpr(p1) = G_ASSERT_ALIGN %copy, 4
    ; CHECK-NEXT: S_ENDPGM 0, implicit %assert_align(p1)
    %copy:_(p1) = COPY $vgpr0_vgpr1
    %assert_align:_(p1) = G_ASSERT_ALIGN %copy, 4
    S_ENDPGM 0, implicit %assert_align
...

---
name:            assert_align_sgpr
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $sgpr8_sgpr9

    ; CHECK-LABEL: name: assert_align_sgpr
    ; CHECK: liveins: $sgpr8_sgpr9
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %copy:sgpr(p1) = COPY $sgpr8_sgpr9
    ; CHECK-NEXT: %assert_align:sgpr(p1) = G_ASSERT_ALIGN %copy, 4
    ; CHECK-NEXT: S_ENDPGM 0, implicit %assert_align(p1)
    %copy:_(p1) = COPY $sgpr8_sgpr9
    %assert_align:_(p1) = G_ASSERT_ALIGN %copy, 4
    S_ENDPGM 0, implicit %assert_align
...

---
name:            assert_align_agpr
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $agpr0_agpr1

    ; CHECK-LABEL: name: assert_align_agpr
    ; CHECK: liveins: $agpr0_agpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %copy:agpr(p1) = COPY $agpr0_agpr1
    ; CHECK-NEXT: %assert_align:agpr(p1) = G_ASSERT_ALIGN %copy, 4
    ; CHECK-NEXT: S_ENDPGM 0, implicit %assert_align(p1)
    %copy:_(p1) = COPY $agpr0_agpr1
    %assert_align:_(p1) = G_ASSERT_ALIGN %copy, 4
    S_ENDPGM 0, implicit %assert_align
...