| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s |
| --- |
| name: test_scalar_and_small |
| body: | |
| bb.0.entry: |
| ; CHECK-LABEL: name: test_scalar_and_small |
| ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 |
| ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) |
| ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64) |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[TRUNC1]] |
| ; CHECK-NEXT: $w0 = COPY [[AND]](s32) |
| ; CHECK-NEXT: $x0 = COPY [[COPY]](s64) |
| %0:_(s64) = COPY $x0 |
| %1:_(s64) = COPY $x1 |
| %2:_(s8) = G_TRUNC %0(s64) |
| %3:_(s8) = G_TRUNC %1(s64) |
| %4:_(s8) = G_AND %2, %3 |
| %6:_(s32) = G_ANYEXT %4(s8) |
| $w0 = COPY %6(s32) |
| %5:_(s64) = G_ANYEXT %2(s8) |
| $x0 = COPY %5(s64) |
| |
| ... |
| --- |
| name: test_nonpow2 |
| body: | |
| bb.0.entry: |
| ; CHECK-LABEL: name: test_nonpow2 |
| ; CHECK: %ptr:_(p0) = COPY $x0 |
| ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD %ptr(p0) :: (load (s64), align 16) |
| ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 |
| ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 |
| ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C1]](s64) |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[PTR_ADD]](p0) |
| ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16) from unknown-address + 8, align 8) |
| ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 |
| ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C2]](s64) |
| ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s8) from unknown-address + 10, align 2) |
| ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF |
| ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD1]](s32), [[DEF]](s32) |
| ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 |
| ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[MV]], [[C3]](s64) |
| ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[ZEXTLOAD]] |
| ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[C]], [[LOAD]] |
| ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR]], [[C]] |
| ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD %ptr(p0) :: (load (s64), align 16) |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY [[PTR_ADD]](p0) |
| ; CHECK-NEXT: [[ZEXTLOAD1:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY1]](p0) :: (load (s16) from unknown-address + 8, align 8) |
| ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C2]](s64) |
| ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s8) from unknown-address + 10, align 2) |
| ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD3]](s32), [[DEF]](s32) |
| ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[MV1]], [[C3]](s64) |
| ; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[ZEXTLOAD1]] |
| ; CHECK-NEXT: [[OR4:%[0-9]+]]:_(s64) = G_OR [[C]], [[LOAD2]] |
| ; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s64) = G_OR [[OR3]], [[C]] |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[OR1]], [[OR4]] |
| ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[OR2]], [[OR5]] |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[AND]](s64) |
| ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64) |
| ; CHECK-NEXT: G_STORE [[COPY2]](s64), %ptr(p0) :: (store (s64), align 16) |
| ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C3]](s64) |
| ; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C2]](s64) |
| ; CHECK-NEXT: G_STORE [[TRUNC]](s32), [[PTR_ADD]](p0) :: (store (s16) into unknown-address + 8, align 8) |
| ; CHECK-NEXT: G_STORE [[LSHR]](s32), [[PTR_ADD3]](p0) :: (store (s8) into unknown-address + 10, align 2) |
| %ptr:_(p0) = COPY $x0 |
| %a:_(s88) = G_LOAD %ptr(p0) :: (load (s88)) |
| %b:_(s88) = G_LOAD %ptr(p0) :: (load (s88)) |
| %and:_(s88) = G_AND %a, %b |
| G_STORE %and(s88), %ptr(p0) :: (store (s88)) |
| ... |
| --- |
| name: test_s318_and |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x0 |
| |
| ; CHECK-LABEL: name: test_s318_and |
| ; CHECK: liveins: $x0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF |
| ; CHECK-NEXT: %ptr:_(p0) = COPY $x0 |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]] |
| ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]] |
| ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]] |
| ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]] |
| ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]] |
| ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1 |
| ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4611686018427387903 |
| ; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[AND]], [[C]] |
| ; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s64) = G_AND [[AND1]], [[C]] |
| ; CHECK-NEXT: [[AND7:%[0-9]+]]:_(s64) = G_AND [[AND2]], [[C]] |
| ; CHECK-NEXT: [[AND8:%[0-9]+]]:_(s64) = G_AND [[AND3]], [[C]] |
| ; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s64) = G_AND [[AND4]], [[C1]] |
| ; CHECK-NEXT: G_STORE [[AND5]](s64), %ptr(p0) :: (store (s64), align 64) |
| ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 |
| ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64) |
| ; CHECK-NEXT: G_STORE [[AND6]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8) |
| ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 |
| ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64) |
| ; CHECK-NEXT: G_STORE [[AND7]](s64), [[PTR_ADD1]](p0) :: (store (s64) into unknown-address + 16, align 16) |
| ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 |
| ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C4]](s64) |
| ; CHECK-NEXT: G_STORE [[AND8]](s64), [[PTR_ADD2]](p0) :: (store (s64) into unknown-address + 24) |
| ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 |
| ; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C5]](s64) |
| ; CHECK-NEXT: G_STORE [[AND9]](s64), [[PTR_ADD3]](p0) :: (store (s64) into unknown-address + 32, align 32) |
| ; CHECK-NEXT: RET_ReallyLR implicit $x0 |
| %a:_(s318) = G_IMPLICIT_DEF |
| %b:_(s318) = G_IMPLICIT_DEF |
| %ptr:_(p0) = COPY $x0 |
| %and:_(s318) = G_AND %a, %b |
| G_STORE %and(s318), %ptr(p0) :: (store (s318)) |
| RET_ReallyLR implicit $x0 |
| ... |
| --- |
| name: test_s158_and |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x0 |
| ; CHECK-LABEL: name: test_s158_and |
| ; CHECK: liveins: $x0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF |
| ; CHECK-NEXT: %ptr:_(p0) = COPY $x0 |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]] |
| ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]] |
| ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]] |
| ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]] |
| ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]] |
| ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1 |
| ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4611686018427387903 |
| ; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[AND]], [[C]] |
| ; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s64) = G_AND [[AND1]], [[C]] |
| ; CHECK-NEXT: [[AND7:%[0-9]+]]:_(s64) = G_AND [[AND2]], [[C]] |
| ; CHECK-NEXT: [[AND8:%[0-9]+]]:_(s64) = G_AND [[AND3]], [[C]] |
| ; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s64) = G_AND [[AND4]], [[C1]] |
| ; CHECK-NEXT: G_STORE [[AND5]](s64), %ptr(p0) :: (store (s64), align 64) |
| ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 |
| ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64) |
| ; CHECK-NEXT: G_STORE [[AND6]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8) |
| ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 |
| ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64) |
| ; CHECK-NEXT: G_STORE [[AND7]](s64), [[PTR_ADD1]](p0) :: (store (s64) into unknown-address + 16, align 16) |
| ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 |
| ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C4]](s64) |
| ; CHECK-NEXT: G_STORE [[AND8]](s64), [[PTR_ADD2]](p0) :: (store (s64) into unknown-address + 24) |
| ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 |
| ; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C5]](s64) |
| ; CHECK-NEXT: G_STORE [[AND9]](s64), [[PTR_ADD3]](p0) :: (store (s64) into unknown-address + 32, align 32) |
| ; CHECK-NEXT: RET_ReallyLR implicit $x0 |
| %a:_(s318) = G_IMPLICIT_DEF |
| %b:_(s318) = G_IMPLICIT_DEF |
| %ptr:_(p0) = COPY $x0 |
| %and:_(s318) = G_AND %a, %b |
| G_STORE %and(s318), %ptr(p0) :: (store (s318)) |
| RET_ReallyLR implicit $x0 |
| |
| ... |
| --- |
| name: test_vector_and_v16s16 |
| body: | |
| bb.0.entry: |
| ; CHECK-LABEL: name: test_vector_and_v16s16 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<8 x s16>) = COPY $q1 |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<8 x s16>) = G_AND [[COPY]], [[COPY]] |
| ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<8 x s16>) = G_AND [[COPY1]], [[COPY1]] |
| ; CHECK-NEXT: $q0 = COPY [[AND]](<8 x s16>) |
| ; CHECK-NEXT: $q1 = COPY [[AND1]](<8 x s16>) |
| %1:_(<8 x s16>) = COPY $q0 |
| %2:_(<8 x s16>) = COPY $q1 |
| %0:_(<16 x s16>) = G_CONCAT_VECTORS %1(<8 x s16>), %2(<8 x s16>) |
| %3:_(<16 x s16>) = G_AND %0, %0 |
| %4:_(<8 x s16>), %5:_(<8 x s16>) = G_UNMERGE_VALUES %3(<16 x s16>) |
| $q0 = COPY %4(<8 x s16>) |
| $q1 = COPY %5(<8 x s16>) |
| |
| ... |
| --- |
| name: test_vector_and_v32s8 |
| body: | |
| bb.0.entry: |
| ; CHECK-LABEL: name: test_vector_and_v32s8 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $q1 |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<16 x s8>) = G_AND [[COPY]], [[COPY]] |
| ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<16 x s8>) = G_AND [[COPY1]], [[COPY1]] |
| ; CHECK-NEXT: $q0 = COPY [[AND]](<16 x s8>) |
| ; CHECK-NEXT: $q1 = COPY [[AND1]](<16 x s8>) |
| %0:_(<16 x s8>) = COPY $q0 |
| %1:_(<16 x s8>) = COPY $q1 |
| %2:_(<32 x s8>) = G_CONCAT_VECTORS %0, %1 |
| %3:_(<32 x s8>) = G_AND %2, %2 |
| %7:_(<16 x s8>), %8:_(<16 x s8>) = G_UNMERGE_VALUES %3(<32 x s8>) |
| $q0 = COPY %7(<16 x s8>) |
| $q1 = COPY %8(<16 x s8>) |
| |
| ... |
| --- |
| name: and_v2s1 |
| tracksRegLiveness: true |
| body: | |
| bb.1: |
| liveins: $d0, $d1, $d2, $d3 |
| |
| ; CHECK-LABEL: name: and_v2s1 |
| ; CHECK: liveins: $d0, $d1, $d2, $d3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1 |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY $d2 |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<2 x s32>) = COPY $d3 |
| ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s32>) = G_ICMP intpred(eq), [[COPY]](<2 x s32>), [[COPY1]] |
| ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<2 x s32>) = G_ICMP intpred(eq), [[COPY2]](<2 x s32>), [[COPY3]] |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[ICMP]], [[ICMP1]] |
| ; CHECK-NEXT: $d0 = COPY [[AND]](<2 x s32>) |
| ; CHECK-NEXT: RET_ReallyLR implicit $d0 |
| %0:_(<2 x s32>) = COPY $d0 |
| %1:_(<2 x s32>) = COPY $d1 |
| %2:_(<2 x s32>) = COPY $d2 |
| %3:_(<2 x s32>) = COPY $d3 |
| %4:_(<2 x s1>) = G_ICMP intpred(eq), %0(<2 x s32>), %1 |
| %5:_(<2 x s1>) = G_ICMP intpred(eq), %2(<2 x s32>), %3 |
| %6:_(<2 x s1>) = G_AND %4, %5 |
| %7:_(<2 x s32>) = G_ANYEXT %6 |
| $d0 = COPY %7:_(<2 x s32>) |
| RET_ReallyLR implicit $d0 |
| ... |
| --- |
| name: and_v3s1 |
| tracksRegLiveness: true |
| body: | |
| bb.1: |
| liveins: $b0, $b1, $b2 |
| |
| ; CHECK-LABEL: name: and_v3s1 |
| ; CHECK: liveins: $b0, $b1, $b2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $b0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s8) = COPY $b1 |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s8) = COPY $b2 |
| ; CHECK-NEXT: [[ANYEXT0:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY]](s8) |
| ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY1]](s8) |
| ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY2]](s8) |
| ; CHECK-NEXT: [[IMPLICIT_DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF |
| ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[ANYEXT0]](s16), [[ANYEXT1]](s16), [[ANYEXT2]](s16), [[IMPLICIT_DEF]](s16) |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<4 x s16>) = G_AND [[BUILD_VECTOR]], [[BUILD_VECTOR]] |
| ; CHECK-NEXT: [[VAL0:%[0-9]+]]:_(s16), [[VAL1:%[0-9]+]]:_(s16), [[VAL2:%[0-9]+]]:_(s16), [[VAL3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[AND]](<4 x s16>) |
| ; CHECK-NEXT: [[TRUNC3:%[0-9]+]]:_(s8) = G_TRUNC [[VAL0]](s16) |
| ; CHECK-NEXT: $b0 = COPY [[TRUNC3]](s8) |
| ; CHECK-NEXT: RET_ReallyLR implicit $b0 |
| %1:_(s8) = COPY $b0 |
| %2:_(s8) = COPY $b1 |
| %3:_(s8) = COPY $b2 |
| %4:_(<3 x s8>) = G_BUILD_VECTOR %1(s8), %2(s8), %3(s8) |
| %0:_(<3 x s1>) = G_TRUNC %4(<3 x s8>) |
| %5:_(<3 x s1>) = G_AND %0, %0 |
| %7:_(<3 x s8>) = G_ANYEXT %5(<3 x s1>) |
| %8:_(s8), %9:_(s8), %10:_(s8) = G_UNMERGE_VALUES %7(<3 x s8>) |
| $b0 = COPY %8:_(s8) |
| RET_ReallyLR implicit $b0 |
| ... |
| --- |
| name: and_v4s1 |
| tracksRegLiveness: true |
| body: | |
| bb.1: |
| liveins: $d0, $d1, $d2, $d3 |
| |
| ; CHECK-LABEL: name: and_v4s1 |
| ; CHECK: liveins: $d0, $d1, $d2, $d3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $d1 |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<4 x s16>) = COPY $d2 |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<4 x s16>) = COPY $d3 |
| ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s16>) = G_ICMP intpred(eq), [[COPY]](<4 x s16>), [[COPY1]] |
| ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<4 x s16>) = G_ICMP intpred(eq), [[COPY2]](<4 x s16>), [[COPY3]] |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<4 x s16>) = G_AND [[ICMP]], [[ICMP1]] |
| ; CHECK-NEXT: $d0 = COPY [[AND]](<4 x s16>) |
| ; CHECK-NEXT: RET_ReallyLR implicit $d0 |
| %0:_(<4 x s16>) = COPY $d0 |
| %1:_(<4 x s16>) = COPY $d1 |
| %2:_(<4 x s16>) = COPY $d2 |
| %3:_(<4 x s16>) = COPY $d3 |
| %4:_(<4 x s1>) = G_ICMP intpred(eq), %0(<4 x s16>), %1 |
| %5:_(<4 x s1>) = G_ICMP intpred(eq), %2(<4 x s16>), %3 |
| %6:_(<4 x s1>) = G_AND %4, %5 |
| %7:_(<4 x s16>) = G_ANYEXT %6 |
| $d0 = COPY %7:_(<4 x s16>) |
| RET_ReallyLR implicit $d0 |
| ... |
| --- |
| name: and_v8s1 |
| tracksRegLiveness: true |
| body: | |
| bb.1: |
| liveins: $d0, $d1, $d2, $d3 |
| |
| ; CHECK-LABEL: name: and_v8s1 |
| ; CHECK: liveins: $d0, $d1, $d2, $d3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s8>) = COPY $d0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<8 x s8>) = COPY $d1 |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<8 x s8>) = COPY $d2 |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<8 x s8>) = COPY $d3 |
| ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<8 x s8>) = G_ICMP intpred(eq), [[COPY]](<8 x s8>), [[COPY1]] |
| ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<8 x s8>) = G_ICMP intpred(eq), [[COPY2]](<8 x s8>), [[COPY3]] |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<8 x s8>) = G_AND [[ICMP]], [[ICMP1]] |
| ; CHECK-NEXT: $d0 = COPY [[AND]](<8 x s8>) |
| ; CHECK-NEXT: RET_ReallyLR implicit $d0 |
| %0:_(<8 x s8>) = COPY $d0 |
| %1:_(<8 x s8>) = COPY $d1 |
| %2:_(<8 x s8>) = COPY $d2 |
| %3:_(<8 x s8>) = COPY $d3 |
| %4:_(<8 x s1>) = G_ICMP intpred(eq), %0(<8 x s8>), %1 |
| %5:_(<8 x s1>) = G_ICMP intpred(eq), %2(<8 x s8>), %3 |
| %6:_(<8 x s1>) = G_AND %4, %5 |
| %7:_(<8 x s8>) = G_ANYEXT %6 |
| $d0 = COPY %7:_(<8 x s8>) |
| RET_ReallyLR implicit $d0 |
| ... |
| --- |
| name: and_v16s1 |
| tracksRegLiveness: true |
| body: | |
| bb.1: |
| liveins: $q0, $q1, $q2, $q3 |
| |
| ; CHECK-LABEL: name: and_v16s1 |
| ; CHECK: liveins: $q0, $q1, $q2, $q3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $q1 |
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<16 x s8>) = COPY $q2 |
| ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<16 x s8>) = COPY $q3 |
| ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<16 x s8>) = G_ICMP intpred(eq), [[COPY]](<16 x s8>), [[COPY1]] |
| ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<16 x s8>) = G_ICMP intpred(eq), [[COPY2]](<16 x s8>), [[COPY3]] |
| ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<16 x s8>) = G_AND [[ICMP]], [[ICMP1]] |
| ; CHECK-NEXT: $q0 = COPY [[AND]](<16 x s8>) |
| ; CHECK-NEXT: RET_ReallyLR implicit $q0 |
| %0:_(<16 x s8>) = COPY $q0 |
| %1:_(<16 x s8>) = COPY $q1 |
| %2:_(<16 x s8>) = COPY $q2 |
| %3:_(<16 x s8>) = COPY $q3 |
| %4:_(<16 x s1>) = G_ICMP intpred(eq), %0(<16 x s8>), %1 |
| %5:_(<16 x s1>) = G_ICMP intpred(eq), %2(<16 x s8>), %3 |
| %6:_(<16 x s1>) = G_AND %4, %5 |
| %7:_(<16 x s8>) = G_ANYEXT %6 |
| $q0 = COPY %7:_(<16 x s8>) |
| RET_ReallyLR implicit $q0 |
| ... |