| #include <bindings/qcom,audio-ext-clk.h> |
| #include <bindings/qcom,gpr.h> |
| #include "msm-audio-lpass.dtsi" |
| |
| &soc { |
| spf_core_platform: spf_core_platform { |
| compatible = "qcom,spf-core-platform"; |
| }; |
| |
| lpass_audio_hw_vote: vote_lpass_audio_hw { |
| compatible = "qcom,audio-ref-clk"; |
| qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>; |
| #clock-cells = <1>; |
| }; |
| }; |
| |
| #include "bengal-lpi.dtsi" |
| |
| &glink_edge { |
| audio_gpr: qcom,gpr { |
| compatible = "qcom,gpr"; |
| qcom,glink-channels = "adsp_apps"; |
| qcom,intents = <0x200 20>; |
| reg = <GPR_DOMAIN_ADSP>; |
| |
| spf_core { |
| compatible = "qcom,spf_core"; |
| reg = <GPR_SVC_ADSP_CORE>; |
| }; |
| |
| audio-pkt { |
| compatible = "qcom,audio-pkt"; |
| qcom,audiopkt-ch-name = "apr_audio_svc"; |
| reg = <GPR_SVC_MAX>; |
| }; |
| |
| audio_prm: q6prm { |
| compatible = "qcom,audio_prm"; |
| reg = <GPR_SVC_ASM>; |
| }; |
| }; |
| }; |
| |
| &spf_core_platform { |
| msm_audio_ion: qcom,msm-audio-ion { |
| compatible = "qcom,msm-audio-ion"; |
| qcom,smmu-version = <2>; |
| qcom,smmu-enabled; |
| iommus = <&apps_smmu 0x01c1 0x0>; |
| qcom,smmu-sid-mask = /bits/ 64 <0xf>; |
| qcom,iommu-dma-addr-pool = <0x10000000 0x10000000>; |
| }; |
| |
| msm_audio_ion_cma: qcom,msm-audio-ion-cma { |
| compatible = "qcom,msm-audio-ion-cma"; |
| }; |
| |
| cdc_dmic01_gpios: cdc_dmic01_pinctrl { |
| compatible = "qcom,msm-cdc-pinctrl"; |
| pinctrl-names = "aud_active", "aud_sleep"; |
| pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>; |
| pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>; |
| qcom,lpi-gpios; |
| #gpio-cells = <0>; |
| }; |
| |
| cdc_dmic23_gpios: cdc_dmic23_pinctrl { |
| compatible = "qcom,msm-cdc-pinctrl"; |
| pinctrl-names = "aud_active", "aud_sleep"; |
| pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>; |
| pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>; |
| qcom,lpi-gpios; |
| #gpio-cells = <0>; |
| }; |
| |
| rx_swr_gpios: rx_swr_clk_data_pinctrl { |
| compatible = "qcom,msm-cdc-pinctrl"; |
| pinctrl-names = "aud_active", "aud_sleep"; |
| pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active |
| &rx_swr_data1_active>; |
| pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep |
| &rx_swr_data1_sleep>; |
| qcom,lpi-gpios; |
| #gpio-cells = <0>; |
| }; |
| |
| va_swr_gpios: va_swr_clk_data_pinctrl { |
| compatible = "qcom,msm-cdc-pinctrl"; |
| pinctrl-names = "aud_active", "aud_sleep"; |
| pinctrl-0 = <&tx_swr_clk_active &tx_swr_data1_active |
| &tx_swr_data2_active>; |
| pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data1_sleep |
| &tx_swr_data2_sleep>; |
| qcom,lpi-gpios; |
| qcom,chip-wakeup-reg = <0x003ca04c>; |
| qcom,chip-wakeup-maskbit = <0>; |
| qcom,chip-wakeup-default-val = <0x1>; |
| #gpio-cells = <0>; |
| }; |
| |
| wsa881x_analog_clk_gpio: msm_cdc_pinctrl@18 { |
| compatible = "qcom,msm-cdc-pinctrl"; |
| pinctrl-names = "aud_active", "aud_sleep"; |
| pinctrl-0 = <&wsa_mclk_active>; |
| pinctrl-1 = <&wsa_mclk_sleep>; |
| qcom,lpi-gpios; |
| #gpio-cells = <0>; |
| }; |
| |
| bolero_cdc: bolero-codec { |
| compatible = "qcom,bolero-codec"; |
| clock-names = "lpass_audio_hw_vote"; |
| clocks = <&lpass_audio_hw_vote 0>; |
| |
| bolero-clk-rsc-mngr { |
| compatible = "qcom,bolero-clk-rsc-mngr"; |
| }; |
| |
| va_macro: va-macro@a730000 { |
| swr0: va_swr_master { |
| }; |
| }; |
| |
| rx_macro: rx-macro@a600000 { |
| swr1: rx_swr_master { |
| }; |
| }; |
| }; |
| |
| bengal_snd: sound { |
| compatible = "qcom,bengal-asoc-snd"; |
| qcom,mi2s-audio-intf = <0>; |
| qcom,auxpcm-audio-intf = <0>; |
| qcom,tdm-audio-intf = <0>; |
| qcom,wcn-btfm = <0>; |
| qcom,afe-rxtx-lb = <0>; |
| fsa4480-i2c-handle = <&fsa4480>; |
| }; |
| }; |
| |
| &qupv3_se1_i2c { |
| status = "ok"; |
| fsa4480: fsa4480@42 { |
| compatible = "qcom,fsa4480-i2c"; |
| reg = <0x42>; |
| }; |
| }; |
| |
| &aliases { |
| swr0 = "/soc/spf_core_platform/bolero-codec/va-macro@a730000/va_swr_master"; |
| swr1 = "/soc/spf_core_platform/bolero-codec/rx-macro@a600000/rx_swr_master"; |
| }; |