tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_smaller.PreCodegen.after.panic-unwind.mir

// MIR for `unchecked_shr_signed_smaller` after PreCodegen

fn unchecked_shr_signed_smaller(_1: i16, _2: u32) -> i16 {
    debug a => _1;
    debug b => _2;
    let mut _0: i16;
    scope 1 (inlined core::num::<impl i16>::unchecked_shr) {
        debug self => _1;
        debug rhs => _2;
        let mut _3: bool;
        let mut _4: i16;
        scope 2 {
        }
    }

    bb0: {
        StorageLive(_4);
        StorageLive(_3);
        _3 = Le(_2, const 32767_u32);
        assume(move _3);
        StorageDead(_3);
        _4 = _2 as i16 (IntToInt);
        _0 = ShrUnchecked(_1, move _4);
        StorageDead(_4);
        return;
    }
}