src/llvm-project/llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+lzcnt -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64
# RUN: llc -mtriple=i386-linux-gnu -mattr=+lzcnt -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*'  %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86
# RUN: FileCheck -check-prefix=ERR32  %s < %t

# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %10:_(s64) = G_CTLZ_ZERO_UNDEF %4:_(s32) (in function: test_ctlz64)

# test count leading zeros for s16, s32, and s64

---
name:            test_ctlz35
alignment:       16
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
body:             |
  bb.1:
    ; X64-LABEL: name: test_ctlz35
    ; X64: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx
    ; X64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 34359738367
    ; X64-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
    ; X64-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[AND]](s64)
    ; X64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 29
    ; X64-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[CTLZ]], [[C1]]
    ; X64-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C]]
    ; X64-NEXT: RET 0, implicit [[AND1]](s64)
    ; X86-LABEL: name: test_ctlz35
    ; X86: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx
    ; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[COPY]](s64)
    ; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC]](s35)
    ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ZEXT]](s64)
    ; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV1]](s32), [[C]]
    ; X86-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[UV]](s32)
    ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
    ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTLZ]], [[C1]]
    ; X86-NEXT: [[CTLZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_UNDEF [[UV1]](s32)
    ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
    ; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTLZ_ZERO_UNDEF]](s64)
    ; X86-NEXT: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
    ; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT1]](s32), [[UV2]], [[UV4]]
    ; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT1]](s32), [[UV3]], [[UV5]]
    ; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
    ; X86-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
    ; X86-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C2]](s32), [[C]](s32)
    ; X86-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64)
    ; X86-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV1]](s64)
    ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV6]], [[UV8]]
    ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV7]], [[UV9]], [[USUBO1]]
    ; X86-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
    ; X86-NEXT: [[TRUNC1:%[0-9]+]]:_(s35) = G_TRUNC [[MV2]](s64)
    ; X86-NEXT: [[ZEXT2:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC1]](s35)
    ; X86-NEXT: RET 0, implicit [[ZEXT2]](s64)
    %0(s64) = COPY $rdx
    %1:_(s35) = G_TRUNC %0(s64)
    %2:_(s35) = G_CTLZ %1
    %3:_(s64) = G_ZEXT %2
    RET 0, implicit %3
...
---
name:            test_ctlz8
alignment:       16
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
  - { id: 1, class: _, preferred-register: '' }
body:             |
  bb.1:
    ; CHECK-LABEL: name: test_ctlz8
    ; CHECK: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
    ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[DEF]](s8)
    ; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s16) = G_CTLZ [[ZEXT]](s16)
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s16) = G_SUB [[CTLZ]], [[C]]
    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SUB]](s16)
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY [[TRUNC]](s8)
    ; CHECK-NEXT: RET 0, implicit [[COPY]](s8)
    %0:_(s8) = IMPLICIT_DEF
    %1:_(s8) = G_CTLZ %0
    %2:_(s8) = COPY %1(s8)
    RET 0, implicit %2
...
---
name:            test_ctlz64
alignment:       16
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
  - { id: 1, class: _, preferred-register: '' }
body:             |
  bb.1:
    ; X64-LABEL: name: test_ctlz64
    ; X64: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
    ; X64-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[DEF]](s64)
    ; X64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[CTLZ]](s64)
    ; X64-NEXT: RET 0, implicit [[COPY]](s64)
    ; X86-LABEL: name: test_ctlz64
    ; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
    ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
    ; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV1]](s32), [[C]]
    ; X86-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[UV]](s32)
    ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
    ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTLZ]], [[C1]]
    ; X86-NEXT: [[CTLZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_UNDEF [[UV1]](s32)
    ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
    ; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTLZ_ZERO_UNDEF]](s64)
    ; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
    ; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s32), [[UV2]], [[UV4]]
    ; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s32), [[UV3]], [[UV5]]
    ; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
    ; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
    ; X86-NEXT: RET 0, implicit [[COPY]](s64)
    %0:_(s64) = IMPLICIT_DEF
    %1:_(s64) = G_CTLZ %0
    %2:_(s64) = COPY %1(s64)
    RET 0, implicit %2
...
---
name:            test_ctlz32
alignment:       16
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
  - { id: 1, class: _, preferred-register: '' }
body:             |
  bb.1:
    ; CHECK-LABEL: name: test_ctlz32
    ; CHECK: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
    ; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s32) = G_CTLZ [[DEF]](s32)
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[CTLZ]](s32)
    ; CHECK-NEXT: RET 0, implicit [[COPY]](s32)
    %0:_(s32) = IMPLICIT_DEF
    %1:_(s32) = G_CTLZ %0
    %2:_(s32) = COPY %1(s32)
    RET 0, implicit %2
...
---
name:            test_ctlz16
alignment:       16
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
  - { id: 1, class: _, preferred-register: '' }
body:             |
  bb.1:
    ; CHECK-LABEL: name: test_ctlz16
    ; CHECK: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
    ; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s16) = G_CTLZ [[DEF]](s16)
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[CTLZ]](s16)
    ; CHECK-NEXT: RET 0, implicit [[COPY]](s16)
    %0:_(s16) = IMPLICIT_DEF
    %1:_(s16) = G_CTLZ %0
    %2:_(s16) = COPY %1(s16)
    RET 0, implicit %2
...