src/llvm-project/llvm/test/CodeGen/X86/GlobalISel/legaliz-zext.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X86-32
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X86-64

# test exts

...
---
name:            test_zext12
body:             |
  bb.1:
    ; X86-32-LABEL: name: test_zext12
    ; X86-32: [[DEF:%[0-9]+]]:_(s12) = IMPLICIT_DEF
    ; X86-32-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[DEF]](s12)
    ; X86-32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[ZEXT]](s32)
    ; X86-32-NEXT: RET 0, implicit [[COPY]](s32)
    ; X86-64-LABEL: name: test_zext12
    ; X86-64: [[DEF:%[0-9]+]]:_(s12) = IMPLICIT_DEF
    ; X86-64-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[DEF]](s12)
    ; X86-64-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[ZEXT]](s32)
    ; X86-64-NEXT: RET 0, implicit [[COPY]](s32)
    %0:_(s12) = IMPLICIT_DEF
    %1:_(s32) = G_ZEXT %0
    %2:_(s32) = COPY %1(s32)
    RET 0, implicit %2

...
---
name:            test_sext16b
body:             |
  bb.1:
    ; X86-32-LABEL: name: test_sext16b
    ; X86-32: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
    ; X86-32-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
    ; X86-32-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[DEF]](s16), [[C]](s16)
    ; X86-32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; X86-32-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[C1]](s32)
    ; X86-32-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[MV1]](s64)
    ; X86-32-NEXT: RET 0, implicit [[COPY]](s64)
    ; X86-64-LABEL: name: test_sext16b
    ; X86-64: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
    ; X86-64-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[DEF]](s16)
    ; X86-64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[ZEXT]](s64)
    ; X86-64-NEXT: RET 0, implicit [[COPY]](s64)
    %0:_(s16) = IMPLICIT_DEF
    %1:_(s64) = G_ZEXT %0
    %2:_(s64) = COPY %1(s64)
    RET 0, implicit %2

...
---
name:            test_zext18
body:             |
  bb.1:
    ; X86-32-LABEL: name: test_zext18
    ; X86-32: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
    ; X86-32-NEXT: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[DEF]](s8)
    ; X86-32-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[ZEXT]](s16)
    ; X86-32-NEXT: RET 0, implicit [[COPY]](s16)
    ; X86-64-LABEL: name: test_zext18
    ; X86-64: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
    ; X86-64-NEXT: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[DEF]](s8)
    ; X86-64-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[ZEXT]](s16)
    ; X86-64-NEXT: RET 0, implicit [[COPY]](s16)
    %0:_(s8) = IMPLICIT_DEF
    %1:_(s16) = G_ZEXT %0
    %2:_(s16) = COPY %1(s16)
    RET 0, implicit %2

...