src/llvm-project/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknh.c

// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -emit-llvm %s -o - \
// RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
// RUN:     | FileCheck %s  -check-prefix=RV64ZKNH

#include <stdint.h>

// RV64ZKNH-LABEL: @sha512sig0(
// RV64ZKNH-NEXT:  entry:
// RV64ZKNH-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sha512sig0(i64 [[RS1:%.*]])
// RV64ZKNH-NEXT:    ret i64 [[TMP0]]
//
uint64_t sha512sig0(uint64_t rs1) {
  return __builtin_riscv_sha512sig0(rs1);
}


// RV64ZKNH-LABEL: @sha512sig1(
// RV64ZKNH-NEXT:  entry:
// RV64ZKNH-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sha512sig1(i64 [[RS1:%.*]])
// RV64ZKNH-NEXT:    ret i64 [[TMP0]]
//
uint64_t sha512sig1(uint64_t rs1) {
  return __builtin_riscv_sha512sig1(rs1);
}


// RV64ZKNH-LABEL: @sha512sum0(
// RV64ZKNH-NEXT:  entry:
// RV64ZKNH-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sha512sum0(i64 [[RS1:%.*]])
// RV64ZKNH-NEXT:    ret i64 [[TMP0]]
//
uint64_t sha512sum0(uint64_t rs1) {
  return __builtin_riscv_sha512sum0(rs1);
}


// RV64ZKNH-LABEL: @sha512sum1(
// RV64ZKNH-NEXT:  entry:
// RV64ZKNH-NEXT:    [[TMP0:%.*]] = call i64 @llvm.riscv.sha512sum1(i64 [[RS1:%.*]])
// RV64ZKNH-NEXT:    ret i64 [[TMP0]]
//
uint64_t sha512sum1(uint64_t rs1) {
  return __builtin_riscv_sha512sum1(rs1);
}


// RV64ZKNH-LABEL: @sha256sig0(
// RV64ZKNH-NEXT:  entry:
// RV64ZKNH-NEXT:    [[TMP0:%.*]] = call i32 @llvm.riscv.sha256sig0(i32 [[RS1:%.*]])
// RV64ZKNH-NEXT:    ret i32 [[TMP0]]
//
uint32_t sha256sig0(uint32_t rs1) {
  return __builtin_riscv_sha256sig0(rs1);
}

// RV64ZKNH-LABEL: @sha256sig1(
// RV64ZKNH-NEXT:  entry:
// RV64ZKNH-NEXT:    [[TMP0:%.*]] = call i32 @llvm.riscv.sha256sig1(i32 [[RS1:%.*]])
// RV64ZKNH-NEXT:    ret i32 [[TMP0]]
//
uint32_t sha256sig1(uint32_t rs1) {
  return __builtin_riscv_sha256sig1(rs1);
}


// RV64ZKNH-LABEL: @sha256sum0(
// RV64ZKNH-NEXT:  entry:
// RV64ZKNH-NEXT:    [[TMP0:%.*]] = call i32 @llvm.riscv.sha256sum0(i32 [[RS1:%.*]])
// RV64ZKNH-NEXT:    ret i32 [[TMP0]]
//
uint32_t sha256sum0(uint32_t rs1) {
  return __builtin_riscv_sha256sum0(rs1);
}

// RV64ZKNH-LABEL: @sha256sum1(
// RV64ZKNH-NEXT:  entry:
// RV64ZKNH-NEXT:    [[TMP0:%.*]] = call i32 @llvm.riscv.sha256sum1(i32 [[RS1:%.*]])
// RV64ZKNH-NEXT:    ret i32 [[TMP0]]
//
uint32_t sha256sum1(uint32_t rs1) {
  return __builtin_riscv_sha256sum1(rs1);
}