src/llvm-project/llvm/test/CodeGen/AMDGPU/coalesce-into-dead-subreg-copies.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-coalescing -run-pass=register-coalescer -o - %s | FileCheck %s

# Check that there's no  "Live segment doesn't end at a valid
# instruction" failure after coalescing %0 into %2, which is
# ultimately a pair of dead copies.

---
name: coalesce_into_dead_subreg_copy
tracksRegLiveness: true
machineFunctionInfo:
  isEntryFunction: true
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  stackPtrOffsetReg: '$sgpr32'
  occupancy:       8
body:             |
  ; CHECK-LABEL: name: coalesce_into_dead_subreg_copy
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   dead %2:sreg_64_xexec = S_LOAD_DWORDX2_IMM undef %1:sgpr_64, 24, 0 :: (dereferenceable invariant load (s64), addrspace 4)
  ; CHECK-NEXT:   S_BRANCH %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  bb.0:
    %0:sreg_64_xexec = S_LOAD_DWORDX2_IMM undef %1:sgpr_64, 24, 0 :: (dereferenceable invariant load (s64), addrspace 4)
    undef %2.sub0:sreg_64 = COPY %0.sub0:sreg_64_xexec
    %2.sub1:sreg_64 = COPY killed %0.sub1:sreg_64_xexec
    S_BRANCH %bb.1

  bb.1:

...