Merge Android 14 QPR2 to AOSP main
Bug: 319669529
Merged-In: I6bf80dc609b0ab9e06e1db8a9711896957a0c137
Change-Id: I0156f661a90d3718676c46ef5da0b1370b4c6a87
diff --git a/AndroidProducts.mk b/AndroidProducts.mk
index b343f20..fb1ae52 100644
--- a/AndroidProducts.mk
+++ b/AndroidProducts.mk
@@ -19,10 +19,12 @@
$(LOCAL_DIR)/aosp_ripcurrent_fullmte.mk \
$(LOCAL_DIR)/factory_ripcurrent.mk \
$(LOCAL_DIR)/aosp_husky.mk \
+ $(LOCAL_DIR)/aosp_husky_61_pgagnostic.mk \
$(LOCAL_DIR)/aosp_husky_fullmte.mk \
$(LOCAL_DIR)/aosp_husky_pgagnostic.mk \
$(LOCAL_DIR)/factory_husky.mk \
$(LOCAL_DIR)/aosp_shiba.mk \
+ $(LOCAL_DIR)/aosp_shiba_61_pgagnostic.mk \
$(LOCAL_DIR)/aosp_shiba_fullmte.mk \
$(LOCAL_DIR)/aosp_shiba_pgagnostic.mk \
$(LOCAL_DIR)/factory_shiba.mk
diff --git a/OWNERS b/OWNERS
index 492973e..0914422 100644
--- a/OWNERS
+++ b/OWNERS
@@ -1,4 +1,4 @@
per-file perf/*,thermal/*= jenhaochen@google.com,wvw@google.com,joaodias@google.com
# per-file for Pixel device makefiles, see go/pixel-device-mk-owner-checklist for details.
-per-file *.mk,*/BoardConfig.mk=file:device/google/gs-common:master:/OWNERS
+per-file *.mk,*/BoardConfig.mk=file:device/google/gs-common:main:/OWNERS
diff --git a/PREUPLOAD.cfg b/PREUPLOAD.cfg
new file mode 100644
index 0000000..37ebb5e
--- /dev/null
+++ b/PREUPLOAD.cfg
@@ -0,0 +1,2 @@
+[Builtin Hooks]
+jsonlint = true
diff --git a/aosp_husky_61_pgagnostic.mk b/aosp_husky_61_pgagnostic.mk
new file mode 100644
index 0000000..5687be9
--- /dev/null
+++ b/aosp_husky_61_pgagnostic.mk
@@ -0,0 +1,22 @@
+#
+# Copyright 2023 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+$(call inherit-product, device/google/pixel_61/aosp_husky_61.mk)
+
+PRODUCT_NAME := aosp_husky_61_pgagnostic
+PRODUCT_MODEL := AOSP page-size agnostic Husky 64K ELF
+
+PRODUCT_PAGE_SIZE_AGNOSTIC := true
+PRODUCT_MAX_PAGE_SIZE_SUPPORTED := 65536
diff --git a/aosp_shiba_61_pgagnostic.mk b/aosp_shiba_61_pgagnostic.mk
new file mode 100644
index 0000000..adf61d0
--- /dev/null
+++ b/aosp_shiba_61_pgagnostic.mk
@@ -0,0 +1,22 @@
+#
+# Copyright 2023 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+$(call inherit-product, device/google/pixel_61/aosp_shiba_61.mk)
+
+PRODUCT_NAME := aosp_shiba_61_pgagnostic
+PRODUCT_MODEL := AOSP page-size agnostic Shiba 64K ELF
+
+PRODUCT_PAGE_SIZE_AGNOSTIC := true
+PRODUCT_MAX_PAGE_SIZE_SUPPORTED := 65536
diff --git a/audio/husky/aidl_config/Android.bp b/audio/husky/aidl_config/Android.bp
new file mode 100644
index 0000000..223b678
--- /dev/null
+++ b/audio/husky/aidl_config/Android.bp
@@ -0,0 +1,63 @@
+// Copyright (C) 2023 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+soong_namespace {
+ imports: [
+ "frameworks/av/services/audiopolicy/config",
+ ]
+}
+
+package {
+ default_applicable_licenses: [
+ "Android-Apache-2.0",
+ ],
+}
+
+prebuilt_etc {
+ name: "audio_policy_volumes.xml",
+ src: "audio_policy_volumes.xml",
+ soc_specific: true,
+}
+
+prebuilt_etc {
+ name: "imported_default_volume_tables.xml",
+ src: "//frameworks/av/services/audiopolicy/config:default_volume_tables.xml",
+ soc_specific: true,
+ filename_from_src: true,
+}
+
+prebuilt_etc {
+ name: "audio_platform_configuration.xml",
+ src: "audio_platform_configuration.xml",
+ soc_specific: true,
+ required: [
+ "audio_policy_volumes.xml",
+ "imported_default_volume_tables.xml",
+ ],
+}
+
+prebuilt_etc {
+ name: "mixer_paths_aidl.xml",
+ src: "mixer_paths_aidl.xml",
+ soc_specific: true,
+}
+
+phony {
+ name: "audio_aidl_configs",
+ soc_specific: true,
+ required: [
+ "audio_platform_configuration.xml",
+ "mixer_paths_aidl.xml"
+ ],
+}
diff --git a/audio/husky/aidl_config/audio_platform_configuration.xml b/audio/husky/aidl_config/audio_platform_configuration.xml
index 8707d44..1e775b2 100644
--- a/audio/husky/aidl_config/audio_platform_configuration.xml
+++ b/audio/husky/aidl_config/audio_platform_configuration.xml
@@ -15,10 +15,6 @@
-->
<audioPlatformConfiguration xmlns:xi="http://www.w3.org/2001/XInclude">
<features>
- <feature name="ThermalThrottle">
- <argument name="Type" value="SKIN" />
- <argument name="Name" value="VIRTUAL-SKIN" />
- </feature>
<feature name="BatteryThrottle">
<argument name="Type" value="BCL_VOLTAGE" />
<argument name="Name" value="BCL_AUDIO_BAACL" />
@@ -26,7 +22,7 @@
</feature>
<feature name="PlaybackThermalThrottle">
<argument name="PollWaitMs" value="20000" />
- <argument name="ThermistorName" value="VIRTUAL-SKIN" />
+ <argument name="ThermistorName" value="VIRTUAL-SKIN-SPEAKER" />
<argument name="ThermistorType" value="SKIN" />
<argument name="ThrottlingSeverity" value="MODERATE" />
</feature>
@@ -47,15 +43,7 @@
<devices>
<device name="bluetooth" />
- <device name="usb">
- <argument name="MaxSamplingRate" value="192000" />
- <argument name="UnsupportedFormat" value="S24_LE" />
- <argument name="MaxCapPacketInterval" value="125" />
- <argument name="MaxCapSampleRate" value="192000" />
- <argument name="MaxCapBitWidth" value="32" />
- <argument name="MaxCapChannel" value="2" />
- <argument name="EnableHifi192kMultichannel" value="0" />
- </device>
+ <device name="usb" />
<device name="speaker" codec="cs35l41">
<argument name="SpeakerNum" value="2" />
<argument name="Rotation" />
@@ -66,7 +54,7 @@
<tuners>
<tuner type="playback" name="waves">
<argument name="Sink" value="SPK" />
- <argument name="ThermistorsName" value="VIRTUAL-SKIN" />
+ <argument name="ThermistorsName" value="VIRTUAL-SKIN-SPEAKER" />
</tuner>
<tuner type="telephony" name="fortemedia">
<argument name="VoIP_DLCHs" value="SPK:2,USB:2" />
diff --git a/audio/husky/aidl_config/mixer_paths_aidl.xml b/audio/husky/aidl_config/mixer_paths_aidl.xml
index 48016b4..d22b97c 100644
--- a/audio/husky/aidl_config/mixer_paths_aidl.xml
+++ b/audio/husky/aidl_config/mixer_paths_aidl.xml
@@ -405,6 +405,14 @@
<path name="primary-playback -> bt" />
</path>
+ <path name="primary-playback-0 -> bluetooth-low-energy-headset">
+ <path name="primary-playback -> bt" />
+ </path>
+
+ <path name="primary-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="primary-playback -> bt" />
+ </path>
+
<path name="primary-playback-0 -> usb">
<ctl name="USB_RX Mixer EP2" value="1" />
</path>
@@ -465,6 +473,14 @@
<path name="raw-playback -> bt" />
</path>
+ <path name="raw-playback-0 -> bluetooth-low-energy-headset">
+ <path name="raw-playback -> bt" />
+ </path>
+
+ <path name="raw-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="raw-playback -> bt" />
+ </path>
+
<path name="raw-playback-0 -> usb">
<ctl name="USB_RX Mixer RAW" value="1" />
</path>
@@ -525,6 +541,14 @@
<path name="deep-buffer-playback -> bt" />
</path>
+ <path name="deep-buffer-playback-0 -> bluetooth-low-energy-headset">
+ <path name="deep-buffer-playback -> bt" />
+ </path>
+
+ <path name="deep-buffer-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="deep-buffer-playback -> bt" />
+ </path>
+
<path name="deep-buffer-playback-0 -> usb">
<ctl name="USB_RX Mixer EP6" value="1" />
</path>
@@ -590,6 +614,14 @@
<path name="compress-offload-playback -> bt" />
</path>
+ <path name="compress-offload-playback-0 -> bluetooth-low-energy-headset">
+ <path name="compress-offload-playback -> bt" />
+ </path>
+
+ <path name="compress-offload-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="compress-offload-playback -> bt" />
+ </path>
+
<path name="compress-offload-playback-0 -> usb">
<ctl name="USB_RX Mixer EP7" value="1" />
</path>
@@ -650,6 +682,14 @@
<path name="mmap-playback -> bt" />
</path>
+ <path name="mmap-playback-0 -> bluetooth-low-energy-headset">
+ <path name="mmap-playback -> bt" />
+ </path>
+
+ <path name="mmap-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="mmap-playback -> bt" />
+ </path>
+
<path name="mmap-playback-0 -> usb">
<ctl name="USB_RX Mixer EP1" value="1" />
</path>
@@ -722,6 +762,14 @@
<path name="voip-playback -> bt" />
</path>
+ <path name="voip-playback-0 -> bluetooth-low-energy-headset">
+ <path name="voip-playback -> bt" />
+ </path>
+
+ <path name="voip-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="voip-playback -> bt" />
+ </path>
+
<path name="voip-playback-0 -> usb">
<ctl name="USB_RX Mixer VOIP" value="1" />
</path>
@@ -832,6 +880,14 @@
<path name="haptic-playback -> bt" />
</path>
+ <path name="haptic-playback-0 -> bluetooth-low-energy-headset">
+ <path name="haptic-playback -> bt" />
+ </path>
+
+ <path name="haptic-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="haptic-playback -> bt" />
+ </path>
+
<path name="haptic-playback-0 -> usb">
<ctl name="USB_RX Mixer EP3" value="1" />
<ctl name="TDM_0_RX Mixer EP8" value="1" />
@@ -866,6 +922,14 @@
<path name="usb-microphones -> primary-capture-0" />
</path>
+ <path name="bluetooth-sco-headset-microphones -> primary-capture-0">
+ <ctl name="EP1 TX Mixer BT_TX" value="1" />
+ </path>
+
+ <path name="bluetooth-low-energy-headset-microphones -> primary-capture-0">
+ <ctl name="EP1 TX Mixer BT_TX" value="1" />
+ </path>
+
<path name="microphones -> voip-capture-0">
<ctl name="VOIP TX Mixer INTERNAL_MIC_TX" value="1" />
</path>
@@ -890,6 +954,10 @@
<ctl name="VOIP TX Mixer BT_TX" value="1" />
</path>
+ <path name="bluetooth-low-energy-headset-microphones -> voip-capture-0">
+ <ctl name="VOIP TX Mixer BT_TX" value="1" />
+ </path>
+
<path name="microphones -> fast-capture-0">
<ctl name="EP3 TX Mixer INTERNAL_MIC_TX" value="1" />
</path>
@@ -914,6 +982,10 @@
<ctl name="EP3 TX Mixer BT_TX" value="1" />
</path>
+ <path name="bluetooth-low-energy-headset-microphones -> fast-capture-0">
+ <ctl name="EP3 TX Mixer BT_TX" value="1" />
+ </path>
+
<path name="microphones -> sound-trigger-capture-0">
</path>
@@ -948,6 +1020,14 @@
<path name="voice-call-downlink-0 -> bt" />
</path>
+ <path name="voice-call-downlink-0 -> bluetooth-low-energy-headset">
+ <path name="voice-call-downlink-0 -> bt" />
+ </path>
+
+ <path name="voice-call-downlink-0 -> bluetooth-low-energy-speaker">
+ <path name="voice-call-downlink-0 -> bt" />
+ </path>
+
<path name="voice-call-downlink-0 -> usb">
<ctl name="USB_RX Mixer EP5" value="1" />
</path>
@@ -988,6 +1068,10 @@
<ctl name="EP4 TX Mixer BT_TX" value="1" />
</path>
+ <path name="bluetooth-low-energy-headset-microphones -> voice-call-uplink-0">
+ <ctl name="EP4 TX Mixer BT_TX" value="1" />
+ </path>
+
<path name="null-source -> voice-call-uplink-0">
<ctl name="EP4 TX Mixer INCALL_TX" value="1" />
</path>
@@ -1052,6 +1136,10 @@
<ctl name="EP2 TX Mixer BT_TX" value="1" />
</path>
+ <path name="bluetooth-low-energy-headset-microphones -> mmap-capture-0">
+ <ctl name="EP2 TX Mixer BT_TX" value="1" />
+ </path>
+
<!-- codec setting -->
<!-- Rx device -->
<path name="speaker-earpiece">
@@ -1222,6 +1310,10 @@
<ctl name="MIC Record Soft Gain (dB)" value="0" />
</path>
+ <path name="bluetooth-low-energy-headset-microphones">
+ <path name="bluetooth-sco-headset-microphones" />
+ </path>
+
<path name="usb-headset-microphones">
<ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0" />
<ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="3" />
diff --git a/audio/husky/audio-tables.mk b/audio/husky/audio-tables.mk
index 8aae616..e1b429a 100644
--- a/audio/husky/audio-tables.mk
+++ b/audio/husky/audio-tables.mk
@@ -16,14 +16,11 @@
AUDIO_TABLE_FOLDER := husky
-# Enable this to build AIDL
-# BUILD_AUDIO_AIDL_VERSION := true
+# Choose AIDL config by build flag.
+ifeq ($(RELEASE_PIXEL_AIDL_AUDIO_HAL),true)
+PRODUCT_SOONG_NAMESPACES += device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config
+PRODUCT_PACKAGES += audio_aidl_configs
-ifeq ($(BUILD_AUDIO_AIDL_VERSION),true)
-PRODUCT_COPY_FILES += \
- device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_platform_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_platform_configuration.xml \
- device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_policy_volumes.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_volumes.xml \
- device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/mixer_paths_aidl.xml:$(TARGET_COPY_OUT_VENDOR)/etc/mixer_paths_aidl.xml
else
# Platform Configuration for AudioHAL / SoundTriggerHAL
PRODUCT_COPY_FILES += \
diff --git a/audio/husky/config/audio_policy_configuration.xml b/audio/husky/config/audio_policy_configuration.xml
index 524f102..a9120dd 100644
--- a/audio/husky/config/audio_policy_configuration.xml
+++ b/audio/husky/config/audio_policy_configuration.xml
@@ -50,6 +50,9 @@
<profile name="" format="AUDIO_FORMAT_AAC_HE_V2"
samplingRates="8000 16000 24000 32000 44100 48000"
channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+ <profile name="" format="AUDIO_FORMAT_OPUS"
+ samplingRates="8000 16000 24000 32000 44100 48000"
+ channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
</mixPort>
<mixPort name="haptic" role="source">
<profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
diff --git a/audio/husky/config/audio_policy_configuration_a2dp_offload_disabled.xml b/audio/husky/config/audio_policy_configuration_a2dp_offload_disabled.xml
index 4878bc5..d0dbd1e 100644
--- a/audio/husky/config/audio_policy_configuration_a2dp_offload_disabled.xml
+++ b/audio/husky/config/audio_policy_configuration_a2dp_offload_disabled.xml
@@ -50,6 +50,9 @@
<profile name="" format="AUDIO_FORMAT_AAC_HE_V2"
samplingRates="8000 16000 24000 32000 44100 48000"
channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+ <profile name="" format="AUDIO_FORMAT_OPUS"
+ samplingRates="8000 16000 24000 32000 44100 48000"
+ channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
</mixPort>
<mixPort name="haptic" role="source">
<profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
diff --git a/audio/husky/config/audio_policy_configuration_le_offload_disabled.xml b/audio/husky/config/audio_policy_configuration_le_offload_disabled.xml
index 25bac3d..82b3017 100644
--- a/audio/husky/config/audio_policy_configuration_le_offload_disabled.xml
+++ b/audio/husky/config/audio_policy_configuration_le_offload_disabled.xml
@@ -50,6 +50,9 @@
<profile name="" format="AUDIO_FORMAT_AAC_HE_V2"
samplingRates="8000 16000 24000 32000 44100 48000"
channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+ <profile name="" format="AUDIO_FORMAT_OPUS"
+ samplingRates="8000 16000 24000 32000 44100 48000"
+ channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
</mixPort>
<mixPort name="haptic" role="source">
<profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
diff --git a/audio/husky/tuning/bluenote/smartfeature.gstf b/audio/husky/tuning/bluenote/smartfeature.gstf
index f669a07..d174ae3 100644
--- a/audio/husky/tuning/bluenote/smartfeature.gstf
+++ b/audio/husky/tuning/bluenote/smartfeature.gstf
Binary files differ
diff --git a/audio/husky/tuning/fortemedia/BLUETOOTH.dat b/audio/husky/tuning/fortemedia/BLUETOOTH.dat
index b70e534..765b2e7 100644
--- a/audio/husky/tuning/fortemedia/BLUETOOTH.dat
+++ b/audio/husky/tuning/fortemedia/BLUETOOTH.dat
Binary files differ
diff --git a/audio/husky/tuning/fortemedia/BLUETOOTH.mods b/audio/husky/tuning/fortemedia/BLUETOOTH.mods
index f93e51a..ad7d9ee 100644
--- a/audio/husky/tuning/fortemedia/BLUETOOTH.mods
+++ b/audio/husky/tuning/fortemedia/BLUETOOTH.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG BLUETOOTH
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-09-14 20:13:28
+#SAVE_TIME 2023-12-11 17:35:22
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -3228,8 +3228,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
diff --git a/audio/husky/tuning/fortemedia/HANDSET.dat b/audio/husky/tuning/fortemedia/HANDSET.dat
index 7762398..49c8696 100644
--- a/audio/husky/tuning/fortemedia/HANDSET.dat
+++ b/audio/husky/tuning/fortemedia/HANDSET.dat
Binary files differ
diff --git a/audio/husky/tuning/fortemedia/HANDSET.mods b/audio/husky/tuning/fortemedia/HANDSET.mods
index b7fb237..b9b4d9a 100644
--- a/audio/husky/tuning/fortemedia/HANDSET.mods
+++ b/audio/husky/tuning/fortemedia/HANDSET.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HANDSET
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-09-14 20:10:18
+#SAVE_TIME 2023-12-11 17:49:37
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -533,8 +533,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x6000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -3228,8 +3228,8 @@
521 0x0000 //TX_GSC_RTOL_TH
522 0x0000 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -5923,8 +5923,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -11313,8 +11313,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x6000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -14008,8 +14008,8 @@
521 0x0000 //TX_GSC_RTOL_TH
522 0x0000 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -16703,8 +16703,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -22093,8 +22093,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -27483,8 +27483,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -32873,8 +32873,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -38263,8 +38263,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -40958,8 +40958,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x6000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -43653,8 +43653,8 @@
521 0x0000 //TX_GSC_RTOL_TH
522 0x0000 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -46348,8 +46348,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -51738,8 +51738,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x6000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -54433,8 +54433,8 @@
521 0x0000 //TX_GSC_RTOL_TH
522 0x0000 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -57128,8 +57128,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -62518,8 +62518,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
diff --git a/audio/husky/tuning/fortemedia/HANDSFREE.dat b/audio/husky/tuning/fortemedia/HANDSFREE.dat
index 72a9f6c..01c0e4c 100644
--- a/audio/husky/tuning/fortemedia/HANDSFREE.dat
+++ b/audio/husky/tuning/fortemedia/HANDSFREE.dat
Binary files differ
diff --git a/audio/husky/tuning/fortemedia/HANDSFREE.mods b/audio/husky/tuning/fortemedia/HANDSFREE.mods
index d1f4462..671700d 100644
--- a/audio/husky/tuning/fortemedia/HANDSFREE.mods
+++ b/audio/husky/tuning/fortemedia/HANDSFREE.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HANDSFREE
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-09-14 20:13:51
+#SAVE_TIME 2023-12-11 17:35:21
#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -3228,8 +3228,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
diff --git a/audio/husky/tuning/fortemedia/HEADSET.dat b/audio/husky/tuning/fortemedia/HEADSET.dat
index f41d674..e41c175 100644
--- a/audio/husky/tuning/fortemedia/HEADSET.dat
+++ b/audio/husky/tuning/fortemedia/HEADSET.dat
Binary files differ
diff --git a/audio/husky/tuning/fortemedia/HEADSET.mods b/audio/husky/tuning/fortemedia/HEADSET.mods
index 1dd2d98..c531e74 100644
--- a/audio/husky/tuning/fortemedia/HEADSET.mods
+++ b/audio/husky/tuning/fortemedia/HEADSET.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HEADSET
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-09-14 20:13:07
+#SAVE_TIME 2023-12-11 17:35:18
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -30178,8 +30178,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -70603,8 +70603,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
diff --git a/audio/shiba/aidl_config/Android.bp b/audio/shiba/aidl_config/Android.bp
new file mode 100644
index 0000000..223b678
--- /dev/null
+++ b/audio/shiba/aidl_config/Android.bp
@@ -0,0 +1,63 @@
+// Copyright (C) 2023 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+soong_namespace {
+ imports: [
+ "frameworks/av/services/audiopolicy/config",
+ ]
+}
+
+package {
+ default_applicable_licenses: [
+ "Android-Apache-2.0",
+ ],
+}
+
+prebuilt_etc {
+ name: "audio_policy_volumes.xml",
+ src: "audio_policy_volumes.xml",
+ soc_specific: true,
+}
+
+prebuilt_etc {
+ name: "imported_default_volume_tables.xml",
+ src: "//frameworks/av/services/audiopolicy/config:default_volume_tables.xml",
+ soc_specific: true,
+ filename_from_src: true,
+}
+
+prebuilt_etc {
+ name: "audio_platform_configuration.xml",
+ src: "audio_platform_configuration.xml",
+ soc_specific: true,
+ required: [
+ "audio_policy_volumes.xml",
+ "imported_default_volume_tables.xml",
+ ],
+}
+
+prebuilt_etc {
+ name: "mixer_paths_aidl.xml",
+ src: "mixer_paths_aidl.xml",
+ soc_specific: true,
+}
+
+phony {
+ name: "audio_aidl_configs",
+ soc_specific: true,
+ required: [
+ "audio_platform_configuration.xml",
+ "mixer_paths_aidl.xml"
+ ],
+}
diff --git a/audio/shiba/aidl_config/audio_platform_configuration.xml b/audio/shiba/aidl_config/audio_platform_configuration.xml
index 8707d44..1e775b2 100644
--- a/audio/shiba/aidl_config/audio_platform_configuration.xml
+++ b/audio/shiba/aidl_config/audio_platform_configuration.xml
@@ -15,10 +15,6 @@
-->
<audioPlatformConfiguration xmlns:xi="http://www.w3.org/2001/XInclude">
<features>
- <feature name="ThermalThrottle">
- <argument name="Type" value="SKIN" />
- <argument name="Name" value="VIRTUAL-SKIN" />
- </feature>
<feature name="BatteryThrottle">
<argument name="Type" value="BCL_VOLTAGE" />
<argument name="Name" value="BCL_AUDIO_BAACL" />
@@ -26,7 +22,7 @@
</feature>
<feature name="PlaybackThermalThrottle">
<argument name="PollWaitMs" value="20000" />
- <argument name="ThermistorName" value="VIRTUAL-SKIN" />
+ <argument name="ThermistorName" value="VIRTUAL-SKIN-SPEAKER" />
<argument name="ThermistorType" value="SKIN" />
<argument name="ThrottlingSeverity" value="MODERATE" />
</feature>
@@ -47,15 +43,7 @@
<devices>
<device name="bluetooth" />
- <device name="usb">
- <argument name="MaxSamplingRate" value="192000" />
- <argument name="UnsupportedFormat" value="S24_LE" />
- <argument name="MaxCapPacketInterval" value="125" />
- <argument name="MaxCapSampleRate" value="192000" />
- <argument name="MaxCapBitWidth" value="32" />
- <argument name="MaxCapChannel" value="2" />
- <argument name="EnableHifi192kMultichannel" value="0" />
- </device>
+ <device name="usb" />
<device name="speaker" codec="cs35l41">
<argument name="SpeakerNum" value="2" />
<argument name="Rotation" />
@@ -66,7 +54,7 @@
<tuners>
<tuner type="playback" name="waves">
<argument name="Sink" value="SPK" />
- <argument name="ThermistorsName" value="VIRTUAL-SKIN" />
+ <argument name="ThermistorsName" value="VIRTUAL-SKIN-SPEAKER" />
</tuner>
<tuner type="telephony" name="fortemedia">
<argument name="VoIP_DLCHs" value="SPK:2,USB:2" />
diff --git a/audio/shiba/aidl_config/mixer_paths_aidl.xml b/audio/shiba/aidl_config/mixer_paths_aidl.xml
index 48016b4..d22b97c 100644
--- a/audio/shiba/aidl_config/mixer_paths_aidl.xml
+++ b/audio/shiba/aidl_config/mixer_paths_aidl.xml
@@ -405,6 +405,14 @@
<path name="primary-playback -> bt" />
</path>
+ <path name="primary-playback-0 -> bluetooth-low-energy-headset">
+ <path name="primary-playback -> bt" />
+ </path>
+
+ <path name="primary-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="primary-playback -> bt" />
+ </path>
+
<path name="primary-playback-0 -> usb">
<ctl name="USB_RX Mixer EP2" value="1" />
</path>
@@ -465,6 +473,14 @@
<path name="raw-playback -> bt" />
</path>
+ <path name="raw-playback-0 -> bluetooth-low-energy-headset">
+ <path name="raw-playback -> bt" />
+ </path>
+
+ <path name="raw-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="raw-playback -> bt" />
+ </path>
+
<path name="raw-playback-0 -> usb">
<ctl name="USB_RX Mixer RAW" value="1" />
</path>
@@ -525,6 +541,14 @@
<path name="deep-buffer-playback -> bt" />
</path>
+ <path name="deep-buffer-playback-0 -> bluetooth-low-energy-headset">
+ <path name="deep-buffer-playback -> bt" />
+ </path>
+
+ <path name="deep-buffer-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="deep-buffer-playback -> bt" />
+ </path>
+
<path name="deep-buffer-playback-0 -> usb">
<ctl name="USB_RX Mixer EP6" value="1" />
</path>
@@ -590,6 +614,14 @@
<path name="compress-offload-playback -> bt" />
</path>
+ <path name="compress-offload-playback-0 -> bluetooth-low-energy-headset">
+ <path name="compress-offload-playback -> bt" />
+ </path>
+
+ <path name="compress-offload-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="compress-offload-playback -> bt" />
+ </path>
+
<path name="compress-offload-playback-0 -> usb">
<ctl name="USB_RX Mixer EP7" value="1" />
</path>
@@ -650,6 +682,14 @@
<path name="mmap-playback -> bt" />
</path>
+ <path name="mmap-playback-0 -> bluetooth-low-energy-headset">
+ <path name="mmap-playback -> bt" />
+ </path>
+
+ <path name="mmap-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="mmap-playback -> bt" />
+ </path>
+
<path name="mmap-playback-0 -> usb">
<ctl name="USB_RX Mixer EP1" value="1" />
</path>
@@ -722,6 +762,14 @@
<path name="voip-playback -> bt" />
</path>
+ <path name="voip-playback-0 -> bluetooth-low-energy-headset">
+ <path name="voip-playback -> bt" />
+ </path>
+
+ <path name="voip-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="voip-playback -> bt" />
+ </path>
+
<path name="voip-playback-0 -> usb">
<ctl name="USB_RX Mixer VOIP" value="1" />
</path>
@@ -832,6 +880,14 @@
<path name="haptic-playback -> bt" />
</path>
+ <path name="haptic-playback-0 -> bluetooth-low-energy-headset">
+ <path name="haptic-playback -> bt" />
+ </path>
+
+ <path name="haptic-playback-0 -> bluetooth-low-energy-speaker">
+ <path name="haptic-playback -> bt" />
+ </path>
+
<path name="haptic-playback-0 -> usb">
<ctl name="USB_RX Mixer EP3" value="1" />
<ctl name="TDM_0_RX Mixer EP8" value="1" />
@@ -866,6 +922,14 @@
<path name="usb-microphones -> primary-capture-0" />
</path>
+ <path name="bluetooth-sco-headset-microphones -> primary-capture-0">
+ <ctl name="EP1 TX Mixer BT_TX" value="1" />
+ </path>
+
+ <path name="bluetooth-low-energy-headset-microphones -> primary-capture-0">
+ <ctl name="EP1 TX Mixer BT_TX" value="1" />
+ </path>
+
<path name="microphones -> voip-capture-0">
<ctl name="VOIP TX Mixer INTERNAL_MIC_TX" value="1" />
</path>
@@ -890,6 +954,10 @@
<ctl name="VOIP TX Mixer BT_TX" value="1" />
</path>
+ <path name="bluetooth-low-energy-headset-microphones -> voip-capture-0">
+ <ctl name="VOIP TX Mixer BT_TX" value="1" />
+ </path>
+
<path name="microphones -> fast-capture-0">
<ctl name="EP3 TX Mixer INTERNAL_MIC_TX" value="1" />
</path>
@@ -914,6 +982,10 @@
<ctl name="EP3 TX Mixer BT_TX" value="1" />
</path>
+ <path name="bluetooth-low-energy-headset-microphones -> fast-capture-0">
+ <ctl name="EP3 TX Mixer BT_TX" value="1" />
+ </path>
+
<path name="microphones -> sound-trigger-capture-0">
</path>
@@ -948,6 +1020,14 @@
<path name="voice-call-downlink-0 -> bt" />
</path>
+ <path name="voice-call-downlink-0 -> bluetooth-low-energy-headset">
+ <path name="voice-call-downlink-0 -> bt" />
+ </path>
+
+ <path name="voice-call-downlink-0 -> bluetooth-low-energy-speaker">
+ <path name="voice-call-downlink-0 -> bt" />
+ </path>
+
<path name="voice-call-downlink-0 -> usb">
<ctl name="USB_RX Mixer EP5" value="1" />
</path>
@@ -988,6 +1068,10 @@
<ctl name="EP4 TX Mixer BT_TX" value="1" />
</path>
+ <path name="bluetooth-low-energy-headset-microphones -> voice-call-uplink-0">
+ <ctl name="EP4 TX Mixer BT_TX" value="1" />
+ </path>
+
<path name="null-source -> voice-call-uplink-0">
<ctl name="EP4 TX Mixer INCALL_TX" value="1" />
</path>
@@ -1052,6 +1136,10 @@
<ctl name="EP2 TX Mixer BT_TX" value="1" />
</path>
+ <path name="bluetooth-low-energy-headset-microphones -> mmap-capture-0">
+ <ctl name="EP2 TX Mixer BT_TX" value="1" />
+ </path>
+
<!-- codec setting -->
<!-- Rx device -->
<path name="speaker-earpiece">
@@ -1222,6 +1310,10 @@
<ctl name="MIC Record Soft Gain (dB)" value="0" />
</path>
+ <path name="bluetooth-low-energy-headset-microphones">
+ <path name="bluetooth-sco-headset-microphones" />
+ </path>
+
<path name="usb-headset-microphones">
<ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0" />
<ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="3" />
diff --git a/audio/shiba/audio-tables.mk b/audio/shiba/audio-tables.mk
index 9beaa0c..b5e8045 100644
--- a/audio/shiba/audio-tables.mk
+++ b/audio/shiba/audio-tables.mk
@@ -16,14 +16,11 @@
AUDIO_TABLE_FOLDER := shiba
-# Enable this to build AIDL
-# BUILD_AUDIO_AIDL_VERSION := true
+# Choose AIDL config by build flag.
+ifeq ($(RELEASE_PIXEL_AIDL_AUDIO_HAL),true)
+PRODUCT_SOONG_NAMESPACES += device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config
+PRODUCT_PACKAGES += audio_aidl_configs
-ifeq ($(BUILD_AUDIO_AIDL_VERSION),true)
-PRODUCT_COPY_FILES += \
- device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_platform_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_platform_configuration.xml \
- device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/audio_policy_volumes.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_volumes.xml \
- device/google/shusky/audio/$(AUDIO_TABLE_FOLDER)/aidl_config/mixer_paths_aidl.xml:$(TARGET_COPY_OUT_VENDOR)/etc/mixer_paths_aidl.xml
else
# Platform Configuration for AudioHAL / SoundTriggerHAL
PRODUCT_COPY_FILES += \
diff --git a/audio/shiba/config/audio_policy_configuration.xml b/audio/shiba/config/audio_policy_configuration.xml
index 524f102..a9120dd 100644
--- a/audio/shiba/config/audio_policy_configuration.xml
+++ b/audio/shiba/config/audio_policy_configuration.xml
@@ -50,6 +50,9 @@
<profile name="" format="AUDIO_FORMAT_AAC_HE_V2"
samplingRates="8000 16000 24000 32000 44100 48000"
channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+ <profile name="" format="AUDIO_FORMAT_OPUS"
+ samplingRates="8000 16000 24000 32000 44100 48000"
+ channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
</mixPort>
<mixPort name="haptic" role="source">
<profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
diff --git a/audio/shiba/config/audio_policy_configuration_a2dp_offload_disabled.xml b/audio/shiba/config/audio_policy_configuration_a2dp_offload_disabled.xml
index 4878bc5..d0dbd1e 100644
--- a/audio/shiba/config/audio_policy_configuration_a2dp_offload_disabled.xml
+++ b/audio/shiba/config/audio_policy_configuration_a2dp_offload_disabled.xml
@@ -50,6 +50,9 @@
<profile name="" format="AUDIO_FORMAT_AAC_HE_V2"
samplingRates="8000 16000 24000 32000 44100 48000"
channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+ <profile name="" format="AUDIO_FORMAT_OPUS"
+ samplingRates="8000 16000 24000 32000 44100 48000"
+ channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
</mixPort>
<mixPort name="haptic" role="source">
<profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
diff --git a/audio/shiba/config/audio_policy_configuration_le_offload_disabled.xml b/audio/shiba/config/audio_policy_configuration_le_offload_disabled.xml
index 25bac3d..82b3017 100644
--- a/audio/shiba/config/audio_policy_configuration_le_offload_disabled.xml
+++ b/audio/shiba/config/audio_policy_configuration_le_offload_disabled.xml
@@ -50,6 +50,9 @@
<profile name="" format="AUDIO_FORMAT_AAC_HE_V2"
samplingRates="8000 16000 24000 32000 44100 48000"
channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+ <profile name="" format="AUDIO_FORMAT_OPUS"
+ samplingRates="8000 16000 24000 32000 44100 48000"
+ channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
</mixPort>
<mixPort name="haptic" role="source">
<profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
diff --git a/audio/shiba/tuning/bluenote/smartfeature.gstf b/audio/shiba/tuning/bluenote/smartfeature.gstf
index f669a07..d174ae3 100644
--- a/audio/shiba/tuning/bluenote/smartfeature.gstf
+++ b/audio/shiba/tuning/bluenote/smartfeature.gstf
Binary files differ
diff --git a/audio/shiba/tuning/fortemedia/BLUETOOTH.dat b/audio/shiba/tuning/fortemedia/BLUETOOTH.dat
index a7b0a53..ed7839f 100644
--- a/audio/shiba/tuning/fortemedia/BLUETOOTH.dat
+++ b/audio/shiba/tuning/fortemedia/BLUETOOTH.dat
Binary files differ
diff --git a/audio/shiba/tuning/fortemedia/BLUETOOTH.mods b/audio/shiba/tuning/fortemedia/BLUETOOTH.mods
index c5a1c3a..936f68f 100644
--- a/audio/shiba/tuning/fortemedia/BLUETOOTH.mods
+++ b/audio/shiba/tuning/fortemedia/BLUETOOTH.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG BLUETOOTH
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-09-13 17:45:23
+#SAVE_TIME 2023-12-11 17:37:02
#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -3228,8 +3228,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -13480,7 +13480,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BT-VOICE_GENERIC-NB
+#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -16175,7 +16175,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BT-VOICE_GENERIC-WB
+#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -18870,7 +18870,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BT-VOICE_GENERIC-SWB
+#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -21565,7 +21565,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BT-VOICE_GENERIC-FB
+#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -24260,7 +24260,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BT-RESERVE2-SWB
+#CASE_NAME BLUETOOTH-BTNB-RESERVE2-SWB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -26955,7 +26955,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BT_NREC-VOICE_GENERIC-NB
+#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -29650,7 +29650,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BT_NREC-VOICE_GENERIC-WB
+#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -32345,7 +32345,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BT_NREC-VOICE_GENERIC-SWB
+#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -35040,7 +35040,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BT_NREC-VOICE_GENERIC-FB
+#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -37735,7 +37735,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-BT_NREC-RESERVE2-SWB
+#CASE_NAME BLUETOOTH-BTNB_NREC-RESERVE2-SWB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -40430,7 +40430,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-NB
+#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -43125,7 +43125,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-WB
+#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-WB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -45820,7 +45820,7 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
-#CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-SWB
+#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-SWB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
@@ -48515,18875 +48515,18875 @@
286 0x0100 //RX_SPK_VOL
287 0x0000 //RX_VOL_RESRV_0
+#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-FB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x4500 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0400 //TX_DELTA_THR_SN_EST_1
+252 0x0300 //TX_DELTA_THR_SN_EST_2
+253 0x0600 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0019 //TX_NS_LVL_CTRL_3
+285 0x0010 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0019 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000F //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x0011 //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x7000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0200 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0x2064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x0064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0004 //RX_SAMPLINGFREQ_SIG
+160 0x0004 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0500 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0xF600 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB-RESERVE2-SWB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0000 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0x8064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x8064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B0B //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4242 //TX_FDEQ_GAIN_6
+574 0x423C //TX_FDEQ_GAIN_7
+575 0x3C3C //TX_FDEQ_GAIN_8
+576 0x3434 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0xA06C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4444 //RX_FDEQ_GAIN_6
+46 0x4040 //RX_FDEQ_GAIN_7
+47 0x4040 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0xA06C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0000 //RX_SAMPLINGFREQ_SIG
+160 0x0000 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x3800 //RX_THR_PITCH_DET_0
+171 0x3000 //RX_THR_PITCH_DET_1
+172 0x2800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0600 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7EB8 //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x017F //RX_TDDRC_DRC_GAIN
+195 0x0014 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4444 //RX_FDEQ_GAIN_6
+203 0x4040 //RX_FDEQ_GAIN_7
+204 0x4040 //RX_FDEQ_GAIN_8
+205 0x4040 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0000 //RX_FDEQ_BIN_10
+231 0x0000 //RX_FDEQ_BIN_11
+232 0x0000 //RX_FDEQ_BIN_12
+233 0x0000 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0A6D //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4444 //TX_FDEQ_GAIN_7
+575 0x4444 //TX_FDEQ_GAIN_8
+576 0x3C3C //TX_FDEQ_GAIN_9
+577 0x3C3C //TX_FDEQ_GAIN_10
+578 0x3C3C //TX_FDEQ_GAIN_11
+579 0x3C30 //TX_FDEQ_GAIN_12
+580 0x3030 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1112 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0xA06C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0001 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7E70 //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x3C3C //RX_FDEQ_GAIN_9
+49 0x3C3C //RX_FDEQ_GAIN_10
+50 0x3838 //RX_FDEQ_GAIN_11
+51 0x3838 //RX_FDEQ_GAIN_12
+52 0x3030 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1112 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0xA06C //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0001 //RX_SAMPLINGFREQ_SIG
+160 0x0001 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x3800 //RX_THR_PITCH_DET_0
+171 0x3000 //RX_THR_PITCH_DET_1
+172 0x2800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0600 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0xF800 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0001 //RX_TDDRC_THRD_0
+270 0x0001 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7E70 //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x001C //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x3C3C //RX_FDEQ_GAIN_9
+206 0x3C3C //RX_FDEQ_GAIN_10
+207 0x3838 //RX_FDEQ_GAIN_11
+208 0x3838 //RX_FDEQ_GAIN_12
+209 0x3030 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x0E0F //RX_FDEQ_BIN_10
+231 0x0F10 //RX_FDEQ_BIN_11
+232 0x1011 //RX_FDEQ_BIN_12
+233 0x1112 //RX_FDEQ_BIN_13
+234 0x0000 //RX_FDEQ_BIN_14
+235 0x0000 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0xA064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x8064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x286A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x4500 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0400 //TX_DELTA_THR_SN_EST_1
+252 0x0300 //TX_DELTA_THR_SN_EST_2
+253 0x0600 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0019 //TX_NS_LVL_CTRL_3
+285 0x0010 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0019 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000F //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x0011 //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x7000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0200 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0x2064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x0064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0004 //RX_SAMPLINGFREQ_SIG
+160 0x0004 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x4000 //RX_B_PE
+170 0x7800 //RX_THR_PITCH_DET_0
+171 0x7000 //RX_THR_PITCH_DET_1
+172 0x6000 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0500 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0xF600 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x1000 //RX_TDDRC_ALPHA_UP_1
+164 0x1000 //RX_TDDRC_ALPHA_UP_2
+165 0x1000 //RX_TDDRC_ALPHA_UP_3
+166 0x1000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x1000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0304 //RX_FDEQ_BIN_2
+223 0x0405 //RX_FDEQ_BIN_3
+224 0x0607 //RX_FDEQ_BIN_4
+225 0x0809 //RX_FDEQ_BIN_5
+226 0x0A0B //RX_FDEQ_BIN_6
+227 0x0C0D //RX_FDEQ_BIN_7
+228 0x0E0F //RX_FDEQ_BIN_8
+229 0x1011 //RX_FDEQ_BIN_9
+230 0x1214 //RX_FDEQ_BIN_10
+231 0x1618 //RX_FDEQ_BIN_11
+232 0x1C1C //RX_FDEQ_BIN_12
+233 0x2020 //RX_FDEQ_BIN_13
+234 0x2020 //RX_FDEQ_BIN_14
+235 0x2011 //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-RESERVE2-SWB
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0915 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x6000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x0011 //TX_NS_LVL_CTRL_1
+283 0x000F //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MORENS_TFMASK_TH
+381 0xFFEE //TX_DRC_QUIET_FLOOR
+382 0x6000 //TX_RATIODTL_CUT_TH
+383 0xFFF3 //TX_DT_CUT_K1
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_POST_MASK_SUP_HSNE
+392 0x0000 //TX_TAIL_DET_TH
+393 0x0000 //TX_B_LESSCUT_RTO_WTA
+394 0x0000 //TX_MEL_G_R
+395 0x0800 //TX_SUPHIGH_TH
+396 0x00C8 //TX_MASK_G_R
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_C_POST_FLT_MASK
+399 0x0005 //TX_A_POST_FLT_WNS
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DEREVERB_LF_MU
+515 0x0000 //TX_DEREVERB_HF_MU
+516 0x0000 //TX_DEREVERB_DELAY
+517 0x0000 //TX_DEREVERB_COEF_LEN
+518 0x0000 //TX_DEREVERB_DNR
+519 0x0000 //TX_DEREVERB_ALPHA
+520 0x0000 //TX_DEREVERB_BETA
+521 0x0000 //TX_GSC_RTOL_TH
+522 0x0000 //TX_GSC_RTOH_TH
+523 0x0000 //TX_WIDE2_MEANHTH
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x122E //TX_DR_RESRV_7
+527 0x1100 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_BVE_NOISE_FLOOR_0
+553 0x0070 //TX_BVE_NOISE_FLOOR_1
+554 0x0070 //TX_BVE_NOISE_FLOOR_2
+555 0x0010 //TX_BVE_NOISE_FLOOR_3
+556 0x0070 //TX_BVE_NOISE_FLOOR_4
+557 0x00B0 //TX_BVE_NOISE_FLOOR_5
+558 0x0E66 //TX_BVE_NOISE_FLOOR_6
+559 0x0050 //TX_BVE_NOISE_FLOOR_7
+560 0x770A //TX_BVE_NOISE_FLOOR_8
+561 0x0000 //TX_BVE_NOISE_FLOOR_9
+562 0x0000 //TX_BVE_IN_N
+563 0x0000 //TX_BVE_OUT_N
+564 0x0000 //TX_BVE_MICALPHA_DOWN
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_NOISE_FLOOR_TH
+824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
+825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
+826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
+827 0x0000 //TX_NOISE_IN_N
+828 0x0000 //TX_NOISE_OUT_N
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+897 0x0000 //TX_SENDFUNC_REG_MICMUTE
+898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
+899 0x0000 //TX_MICMUTE_RATIO_THR
+900 0x0000 //TX_MICMUTE_AMP_THR
+901 0x0000 //TX_MICMUTE_HPF_IND
+902 0x0000 //TX_MICMUTE_LOG_EYR_TH
+903 0x0000 //TX_MICMUTE_CVG_TIME
+904 0x0000 //TX_MICMUTE_RELEASE_TIME
+905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
+906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
+907 0x0000 //TX_MICMUTE_FRQ_AEC_L
+908 0x0000 //TX_MICMUTE_EAD_THR
+909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
+910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
+911 0x0000 //TX_DTD_THR1_MICMUTE_0
+912 0x0000 //TX_DTD_THR1_MICMUTE_1
+913 0x0000 //TX_DTD_THR1_MICMUTE_2
+914 0x0000 //TX_DTD_THR1_MICMUTE_3
+915 0x0000 //TX_DTD_THR2_MICMUTE_0
+916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
+917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
+918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
+919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
+920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
+921 0x0000 //TX_MICMUTE_C_POST_FLT
+922 0x0000 //TX_MICMUTE_DT_CUT_K
+923 0x0000 //TX_MICMUTE_DT_CUT_THR
+924 0x0000 //TX_MICMUTE_DT_CUT_K2
+925 0x0000 //TX_MICMUTE_DT_CUT_THR2
+926 0x0000 //TX_MICMUTE_DT2_HOLD_N
+927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
+928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
+929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
+930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
+931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
+932 0x0000 //TX_MICMUTE_DT_CUT_K1
+933 0x0000 //TX_MICMUTE_N2_SN_EST
+934 0x0000 //TX_MICMUTE_THR_SN_EST_0
+935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
+936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
+937 0x0000 //TX_MICMUTE_B_POST_FILT_0
+938 0x0000 //TX_MIC1RUB_AMP_THR
+939 0x0000 //TX_MIC1MUTE_RATIO_THR
+940 0x0000 //TX_MIC1MUTE_AMP_THR
+941 0x0000 //TX_MIC1MUTE_CVG_TIME
+942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
+943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
+944 0x0000 //TX_TFMASKM4_2_DT_THR
+945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
+946 0x0000 //TX_AMS_RESRV_04
+947 0x0000 //TX_AMS_RESRV_05
+948 0x0000 //TX_AMS_RESRV_06
+949 0x0000 //TX_AMS_RESRV_07
+950 0x0000 //TX_AMS_RESRV_08
+951 0x0000 //TX_AMS_RESRV_09
+952 0x0000 //TX_AMS_RESRV_10
+953 0x0000 //TX_AMS_RESRV_11
+954 0x0000 //TX_AMS_RESRV_12
+955 0x0000 //TX_AMS_RESRV_13
+956 0x0000 //TX_AMS_RESRV_14
+957 0x0000 //TX_AMS_RESRV_15
+958 0x0000 //TX_AMS_RESRV_16
+959 0x0000 //TX_AMS_RESRV_17
+960 0x0000 //TX_AMS_RESRV_18
+961 0x0000 //TX_AMS_RESRV_19
+962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
+963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
+964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
+965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
+966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
+967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
+968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
+969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
+970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
+971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
+972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
+973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
+974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
+975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
+976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
+977 0x0032 //TX_EASSA_NONLECHO_TH
+978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
+979 0x0000 //TX_EASSA_NNG
+980 0x0800 //TX_EASSA_NONLHFG
+981 0x1000 //TX_EASSA_DT2000HZ_REFG
+982 0x0C00 //TX_EASSA_DT400HZ_MAING
+983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
+984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0 0x8064 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0006 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x000A //RX_MUTE_PERIOD
+26 0x0190 //RX_FADE_IN_PERIOD
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x7FFF //RX_TDDRC_THRD_2
+115 0x7FFF //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0155 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#RX 2
+157 0x8064 //RX_RECVFUNC_MODE_0
+158 0x0000 //RX_RECVFUNC_MODE_1
+159 0x0003 //RX_SAMPLINGFREQ_SIG
+160 0x0003 //RX_SAMPLINGFREQ_PROC
+161 0x000A //RX_FRAME_SZ
+162 0x0000 //RX_DELAY_OPT
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+167 0x0800 //RX_PGA
+168 0x7FFF //RX_A_HP
+169 0x0000 //RX_B_PE
+170 0x1800 //RX_THR_PITCH_DET_0
+171 0x1000 //RX_THR_PITCH_DET_1
+172 0x0800 //RX_THR_PITCH_DET_2
+173 0x0008 //RX_PITCH_BFR_LEN
+174 0x0003 //RX_SBD_PITCH_DET
+175 0x0100 //RX_PP_RESRV_0
+176 0x0020 //RX_PP_RESRV_1
+177 0x0400 //RX_N_SN_EST
+178 0x000C //RX_N2_SN_EST
+179 0x0006 //RX_NS_LVL_CTRL
+180 0x9000 //RX_THR_SN_EST
+181 0x7CCD //RX_LAMBDA_PFILT
+182 0x000A //RX_MUTE_PERIOD
+183 0x0190 //RX_FADE_IN_PERIOD
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+187 0x0002 //RX_EXTRA_NS_L
+188 0x0800 //RX_EXTRA_NS_A
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+192 0x199A //RX_A_POST_FLT
+193 0x0000 //RX_LMT_THRD
+194 0x4000 //RX_LMT_ALPHA
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+268 0x0000 //RX_FILTINDX
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+282 0x7C00 //RX_LAMBDA_PKA_FP
+283 0x2000 //RX_TPKA_FP
+284 0x2000 //RX_MIN_G_FP
+285 0x0080 //RX_MAX_G_FP
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+288 0x0000 //RX_MAXLEVEL_CNG
+289 0x3000 //RX_BWE_UV_TH
+290 0x3000 //RX_BWE_UV_TH2
+291 0x1800 //RX_BWE_UV_TH3
+292 0x1000 //RX_BWE_V_TH
+293 0x04CD //RX_BWE_GAIN1_V_TH1
+294 0x0F33 //RX_BWE_GAIN1_V_TH2
+295 0x7333 //RX_BWE_UV_EQ
+296 0x199A //RX_BWE_V_EQ
+297 0x7333 //RX_BWE_TONE_TH
+298 0x0004 //RX_BWE_UV_HOLD_T
+299 0x6CCD //RX_BWE_GAIN2_ALPHA
+300 0x799A //RX_BWE_GAIN3_ALPHA
+301 0x001E //RX_BWE_CUTOFF
+302 0x3000 //RX_BWE_GAINFILL
+303 0x3200 //RX_BWE_MAXTH_TONE
+304 0x2000 //RX_BWE_EQ_0
+305 0x2000 //RX_BWE_EQ_1
+306 0x2000 //RX_BWE_EQ_2
+307 0x2000 //RX_BWE_EQ_3
+308 0x2000 //RX_BWE_EQ_4
+309 0x2000 //RX_BWE_EQ_5
+310 0x2000 //RX_BWE_EQ_6
+311 0x0000 //RX_BWE_RESRV_0
+312 0x0000 //RX_BWE_RESRV_1
+313 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+163 0x3000 //RX_TDDRC_ALPHA_UP_1
+164 0x3000 //RX_TDDRC_ALPHA_UP_2
+165 0x3000 //RX_TDDRC_ALPHA_UP_3
+166 0x3000 //RX_TDDRC_ALPHA_UP_4
+184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+190 0x7FFF //RX_TDDRC_LIMITER_THRD
+191 0x0800 //RX_TDDRC_LIMITER_GAIN
+269 0x0000 //RX_TDDRC_THRD_0
+270 0x0000 //RX_TDDRC_THRD_1
+271 0x7FFF //RX_TDDRC_THRD_2
+272 0x7FFF //RX_TDDRC_THRD_3
+273 0x7FFF //RX_TDDRC_SLANT_0
+274 0x7FFF //RX_TDDRC_SLANT_1
+275 0x3000 //RX_TDDRC_ALPHA_UP_0
+276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+277 0x0000 //RX_TDDRC_HMNC_FLAG
+278 0x199A //RX_TDDRC_HMNC_GAIN
+279 0x0001 //RX_TDDRC_SMT_FLAG
+280 0x0CCD //RX_TDDRC_SMT_W
+281 0x0155 //RX_TDDRC_DRC_GAIN
+195 0x0020 //RX_FDEQ_SUBNUM
+196 0x4848 //RX_FDEQ_GAIN_0
+197 0x4848 //RX_FDEQ_GAIN_1
+198 0x4848 //RX_FDEQ_GAIN_2
+199 0x4848 //RX_FDEQ_GAIN_3
+200 0x4848 //RX_FDEQ_GAIN_4
+201 0x4848 //RX_FDEQ_GAIN_5
+202 0x4848 //RX_FDEQ_GAIN_6
+203 0x4848 //RX_FDEQ_GAIN_7
+204 0x4848 //RX_FDEQ_GAIN_8
+205 0x4848 //RX_FDEQ_GAIN_9
+206 0x4848 //RX_FDEQ_GAIN_10
+207 0x4848 //RX_FDEQ_GAIN_11
+208 0x4848 //RX_FDEQ_GAIN_12
+209 0x4848 //RX_FDEQ_GAIN_13
+210 0x4848 //RX_FDEQ_GAIN_14
+211 0x4848 //RX_FDEQ_GAIN_15
+212 0x4848 //RX_FDEQ_GAIN_16
+213 0x4848 //RX_FDEQ_GAIN_17
+214 0x4848 //RX_FDEQ_GAIN_18
+215 0x4848 //RX_FDEQ_GAIN_19
+216 0x4848 //RX_FDEQ_GAIN_20
+217 0x4848 //RX_FDEQ_GAIN_21
+218 0x4848 //RX_FDEQ_GAIN_22
+219 0x4848 //RX_FDEQ_GAIN_23
+220 0x0202 //RX_FDEQ_BIN_0
+221 0x0203 //RX_FDEQ_BIN_1
+222 0x0303 //RX_FDEQ_BIN_2
+223 0x0304 //RX_FDEQ_BIN_3
+224 0x0405 //RX_FDEQ_BIN_4
+225 0x0506 //RX_FDEQ_BIN_5
+226 0x0708 //RX_FDEQ_BIN_6
+227 0x090A //RX_FDEQ_BIN_7
+228 0x0B0C //RX_FDEQ_BIN_8
+229 0x0D0E //RX_FDEQ_BIN_9
+230 0x1013 //RX_FDEQ_BIN_10
+231 0x1719 //RX_FDEQ_BIN_11
+232 0x1B1E //RX_FDEQ_BIN_12
+233 0x1E1E //RX_FDEQ_BIN_13
+234 0x1E28 //RX_FDEQ_BIN_14
+235 0x282C //RX_FDEQ_BIN_15
+236 0x0000 //RX_FDEQ_BIN_16
+237 0x0000 //RX_FDEQ_BIN_17
+238 0x0000 //RX_FDEQ_BIN_18
+239 0x0000 //RX_FDEQ_BIN_19
+240 0x0000 //RX_FDEQ_BIN_20
+241 0x0000 //RX_FDEQ_BIN_21
+242 0x0000 //RX_FDEQ_BIN_22
+243 0x0000 //RX_FDEQ_BIN_23
+244 0x4000 //RX_FDEQ_RESRV_0
+245 0x0320 //RX_FDEQ_RESRV_1
+246 0x0018 //RX_FDDRC_BAND_MARGIN_0
+247 0x0030 //RX_FDDRC_BAND_MARGIN_1
+248 0x0050 //RX_FDDRC_BAND_MARGIN_2
+249 0x0080 //RX_FDDRC_BAND_MARGIN_3
+250 0x0007 //RX_FDDRC_BLOCK_EXP
+251 0x5000 //RX_FDDRC_THRD_2_0
+252 0x5000 //RX_FDDRC_THRD_2_1
+253 0x5000 //RX_FDDRC_THRD_2_2
+254 0x5000 //RX_FDDRC_THRD_2_3
+255 0x6400 //RX_FDDRC_THRD_3_0
+256 0x6400 //RX_FDDRC_THRD_3_1
+257 0x6400 //RX_FDDRC_THRD_3_2
+258 0x6400 //RX_FDDRC_THRD_3_3
+259 0x2000 //RX_FDDRC_SLANT_0_0
+260 0x2000 //RX_FDDRC_SLANT_0_1
+261 0x2000 //RX_FDDRC_SLANT_0_2
+262 0x2000 //RX_FDDRC_SLANT_0_3
+263 0x5333 //RX_FDDRC_SLANT_1_0
+264 0x5333 //RX_FDDRC_SLANT_1_1
+265 0x5333 //RX_FDDRC_SLANT_1_2
+266 0x5333 //RX_FDDRC_SLANT_1_3
+267 0x0000 //RX_FDDRC_RESRV_0
+286 0x0100 //RX_SPK_VOL
+287 0x0000 //RX_VOL_RESRV_0
+
#CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-FB
#PARAM_TYPE TX+2RX
#TOTAL_CUSTOM_STEP 7+7
#TX
-0 0x0009 //TX_OPERATION_MODE_0
-1 0x0009 //TX_OPERATION_MODE_1
-2 0x0020 //TX_PATCH_REG
-3 0x0200 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0004 //TX_SAMPLINGFREQ_SIG
-7 0x0004 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0915 //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0000 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7E56 //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0200 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x6000 //TX_EAD_THR
-151 0x0400 //TX_THR_RE_EST
-152 0x3000 //TX_MIN_EQ_RE_EST_0
-153 0x3000 //TX_MIN_EQ_RE_EST_1
-154 0x4000 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x6000 //TX_MIN_EQ_RE_EST_6
-159 0x6000 //TX_MIN_EQ_RE_EST_7
-160 0x6000 //TX_MIN_EQ_RE_EST_8
-161 0x6000 //TX_MIN_EQ_RE_EST_9
-162 0x4000 //TX_MIN_EQ_RE_EST_10
-163 0x4000 //TX_MIN_EQ_RE_EST_11
-164 0x4000 //TX_MIN_EQ_RE_EST_12
-165 0x3000 //TX_LAMBDA_RE_EST
-166 0x4000 //TX_LAMBDA_CB_NLE
-167 0x3000 //TX_C_POST_FLT
-168 0x4500 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x5000 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7F00 //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x0800 //TX_DTD_THR2_0
-205 0x0800 //TX_DTD_THR2_1
-206 0x0800 //TX_DTD_THR2_2
-207 0x0800 //TX_DTD_THR2_3
-208 0x0800 //TX_DTD_THR2_4
-209 0x0100 //TX_DTD_THR2_5
-210 0x0100 //TX_DTD_THR2_6
-211 0x7FFF //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x03E8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00C0 //TX_EPD_OFFSET_00
-233 0x00C0 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF700 //TX_THR_SN_EST_0
-243 0xFB00 //TX_THR_SN_EST_1
-244 0xFA00 //TX_THR_SN_EST_2
-245 0xF700 //TX_THR_SN_EST_3
-246 0xFA00 //TX_THR_SN_EST_4
-247 0xF600 //TX_THR_SN_EST_5
-248 0xF600 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0200 //TX_DELTA_THR_SN_EST_0
-251 0x0400 //TX_DELTA_THR_SN_EST_1
-252 0x0300 //TX_DELTA_THR_SN_EST_2
-253 0x0600 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0200 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x4000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x4000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x2000 //TX_B_POST_FLT_0
-280 0x2000 //TX_B_POST_FLT_1
-281 0x0012 //TX_NS_LVL_CTRL_0
-282 0x0016 //TX_NS_LVL_CTRL_1
-283 0x0016 //TX_NS_LVL_CTRL_2
-284 0x0019 //TX_NS_LVL_CTRL_3
-285 0x0010 //TX_NS_LVL_CTRL_4
-286 0x0010 //TX_NS_LVL_CTRL_5
-287 0x0019 //TX_NS_LVL_CTRL_6
-288 0x0010 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000C //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000F //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x0011 //TX_MIN_GAIN_S_6
-296 0x000C //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7000 //TX_SNRI_SUP_0
-301 0x7000 //TX_SNRI_SUP_1
-302 0x7000 //TX_SNRI_SUP_2
-303 0x6000 //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x6000 //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x0016 //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x6000 //TX_A_POST_FILT_S_0
-315 0x6000 //TX_A_POST_FILT_S_1
-316 0x6000 //TX_A_POST_FILT_S_2
-317 0x6000 //TX_A_POST_FILT_S_3
-318 0x6000 //TX_A_POST_FILT_S_4
-319 0x6000 //TX_A_POST_FILT_S_5
-320 0x6000 //TX_A_POST_FILT_S_6
-321 0x6000 //TX_A_POST_FILT_S_7
-322 0x2000 //TX_B_POST_FILT_0
-323 0x4000 //TX_B_POST_FILT_1
-324 0x2000 //TX_B_POST_FILT_2
-325 0x2000 //TX_B_POST_FILT_3
-326 0x2000 //TX_B_POST_FILT_4
-327 0x2000 //TX_B_POST_FILT_5
-328 0x2000 //TX_B_POST_FILT_6
-329 0x2000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
-339 0x7CCD //TX_LAMBDA_PFILT_S_0
-340 0x7CCD //TX_LAMBDA_PFILT_S_1
-341 0x7CCD //TX_LAMBDA_PFILT_S_2
-342 0x7CCD //TX_LAMBDA_PFILT_S_3
-343 0x7CCD //TX_LAMBDA_PFILT_S_4
-344 0x7CCD //TX_LAMBDA_PFILT_S_5
-345 0x7CCD //TX_LAMBDA_PFILT_S_6
-346 0x7CCD //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
-348 0x0500 //TX_A_PEPPER
-349 0x1600 //TX_K_PEPPER_HF
-350 0x0400 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0020 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x02A6 //TX_NOISE_TH_1
-371 0x04B0 //TX_NOISE_TH_2
-372 0x3194 //TX_NOISE_TH_3
-373 0x0960 //TX_NOISE_TH_4
-374 0x5555 //TX_NOISE_TH_5
-375 0x3FF4 //TX_NOISE_TH_5_2
-376 0x0001 //TX_NOISE_TH_5_3
-377 0x0000 //TX_NOISE_TH_5_4
-378 0x02BC //TX_NOISE_TH_6
-379 0x0020 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0020 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x2900 //TX_MIN_G_CTRL_SSNS
-409 0x0800 //TX_METAL_RTO_THR
-410 0x4848 //TX_NS_FP_K_METAL
-411 0x3A98 //TX_NOISEDET_BOOST_TH
-412 0x0FA0 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x01E0 //TX_NOR_OFF_THR
-498 0x7C00 //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x122E //TX_DR_RESRV_7
-527 0x1100 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x0020 //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4848 //TX_FDEQ_GAIN_7
-575 0x4848 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0304 //TX_FDEQ_BIN_2
-594 0x0405 //TX_FDEQ_BIN_3
-595 0x0607 //TX_FDEQ_BIN_4
-596 0x0809 //TX_FDEQ_BIN_5
-597 0x0A0B //TX_FDEQ_BIN_6
-598 0x0C0D //TX_FDEQ_BIN_7
-599 0x0E0F //TX_FDEQ_BIN_8
-600 0x1011 //TX_FDEQ_BIN_9
-601 0x1214 //TX_FDEQ_BIN_10
-602 0x1618 //TX_FDEQ_BIN_11
-603 0x1C1C //TX_FDEQ_BIN_12
-604 0x2020 //TX_FDEQ_BIN_13
-605 0x2020 //TX_FDEQ_BIN_14
-606 0x2011 //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0E10 //TX_PREEQ_BIN_MIC0_0
-642 0x1010 //TX_PREEQ_BIN_MIC0_1
-643 0x1010 //TX_PREEQ_BIN_MIC0_2
-644 0x1010 //TX_PREEQ_BIN_MIC0_3
-645 0x1010 //TX_PREEQ_BIN_MIC0_4
-646 0x1010 //TX_PREEQ_BIN_MIC0_5
-647 0x1010 //TX_PREEQ_BIN_MIC0_6
-648 0x1010 //TX_PREEQ_BIN_MIC0_7
-649 0x1010 //TX_PREEQ_BIN_MIC0_8
-650 0x1010 //TX_PREEQ_BIN_MIC0_9
-651 0x1010 //TX_PREEQ_BIN_MIC0_10
-652 0x1010 //TX_PREEQ_BIN_MIC0_11
-653 0x1010 //TX_PREEQ_BIN_MIC0_12
-654 0x1010 //TX_PREEQ_BIN_MIC0_13
-655 0x1010 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0E10 //TX_PREEQ_BIN_MIC1_0
-691 0x1010 //TX_PREEQ_BIN_MIC1_1
-692 0x1010 //TX_PREEQ_BIN_MIC1_2
-693 0x1010 //TX_PREEQ_BIN_MIC1_3
-694 0x1010 //TX_PREEQ_BIN_MIC1_4
-695 0x1010 //TX_PREEQ_BIN_MIC1_5
-696 0x1010 //TX_PREEQ_BIN_MIC1_6
-697 0x1010 //TX_PREEQ_BIN_MIC1_7
-698 0x1010 //TX_PREEQ_BIN_MIC1_8
-699 0x1010 //TX_PREEQ_BIN_MIC1_9
-700 0x1010 //TX_PREEQ_BIN_MIC1_10
-701 0x1010 //TX_PREEQ_BIN_MIC1_11
-702 0x1010 //TX_PREEQ_BIN_MIC1_12
-703 0x1010 //TX_PREEQ_BIN_MIC1_13
-704 0x1010 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0E10 //TX_PREEQ_BIN_MIC2_0
-740 0x1010 //TX_PREEQ_BIN_MIC2_1
-741 0x1010 //TX_PREEQ_BIN_MIC2_2
-742 0x1010 //TX_PREEQ_BIN_MIC2_3
-743 0x1010 //TX_PREEQ_BIN_MIC2_4
-744 0x1010 //TX_PREEQ_BIN_MIC2_5
-745 0x1010 //TX_PREEQ_BIN_MIC2_6
-746 0x1010 //TX_PREEQ_BIN_MIC2_7
-747 0x1010 //TX_PREEQ_BIN_MIC2_8
-748 0x1010 //TX_PREEQ_BIN_MIC2_9
-749 0x1010 //TX_PREEQ_BIN_MIC2_10
-750 0x1010 //TX_PREEQ_BIN_MIC2_11
-751 0x1010 //TX_PREEQ_BIN_MIC2_12
-752 0x1010 //TX_PREEQ_BIN_MIC2_13
-753 0x1010 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x2000 //TX_NND_WEIGHT
-765 0x0060 //TX_MIC_CALIBRATION_0
-766 0x0060 //TX_MIC_CALIBRATION_1
-767 0x0070 //TX_MIC_CALIBRATION_2
-768 0x0070 //TX_MIC_CALIBRATION_3
-769 0x0050 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
-772 0x0040 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
-774 0x000F //TX_GAIN_LIMIT_1
-775 0x000F //TX_GAIN_LIMIT_2
-776 0x000F //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x0C00 //TX_TDDRC_ALPHA_UP_01
-784 0x0C00 //TX_TDDRC_ALPHA_UP_02
-785 0x0C00 //TX_TDDRC_ALPHA_UP_03
-786 0x0C00 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
-792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x4848 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0001 //TX_TDDRC_THRD_0
-855 0x0001 //TX_TDDRC_THRD_1
-856 0x1900 //TX_TDDRC_THRD_2
-857 0x1900 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x7B00 //TX_TDDRC_SLANT_1
-860 0x0C00 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0200 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7000 //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0x2064 //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0004 //RX_SAMPLINGFREQ_SIG
-3 0x0004 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x7800 //RX_THR_PITCH_DET_0
-14 0x7000 //RX_THR_PITCH_DET_1
-15 0x6000 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0500 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0xF600 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0x0064 //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0004 //RX_SAMPLINGFREQ_SIG
-160 0x0004 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x7800 //RX_THR_PITCH_DET_0
-171 0x7000 //RX_THR_PITCH_DET_1
-172 0x6000 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0500 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0xF600 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-RESERVE1-RESERVE2-SWB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0001 //TX_OPERATION_MODE_0
-1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x0200 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0003 //TX_SAMPLINGFREQ_SIG
-7 0x0003 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0915 //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0800 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7EFF //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x1800 //TX_THR_PITCH_DET_0
-131 0x1000 //TX_THR_PITCH_DET_1
-132 0x0800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0080 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x7000 //TX_EAD_THR
-151 0x0800 //TX_THR_RE_EST
-152 0x0800 //TX_MIN_EQ_RE_EST_0
-153 0x0800 //TX_MIN_EQ_RE_EST_1
-154 0x0800 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x0800 //TX_MIN_EQ_RE_EST_6
-159 0x0800 //TX_MIN_EQ_RE_EST_7
-160 0x0800 //TX_MIN_EQ_RE_EST_8
-161 0x0800 //TX_MIN_EQ_RE_EST_9
-162 0x0800 //TX_MIN_EQ_RE_EST_10
-163 0x0800 //TX_MIN_EQ_RE_EST_11
-164 0x0800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
-166 0x2000 //TX_LAMBDA_CB_NLE
-167 0x6000 //TX_C_POST_FLT
-168 0x7000 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7800 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7FFF //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x7FFF //TX_DTD_THR2_0
-205 0x7FFF //TX_DTD_THR2_1
-206 0x7FFF //TX_DTD_THR2_2
-207 0x7FFF //TX_DTD_THR2_3
-208 0x7FFF //TX_DTD_THR2_4
-209 0x7FFF //TX_DTD_THR2_5
-210 0x7FFF //TX_DTD_THR2_6
-211 0x1000 //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x0BB8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00F0 //TX_EPD_OFFSET_00
-233 0x00F0 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF400 //TX_THR_SN_EST_0
-243 0xF400 //TX_THR_SN_EST_1
-244 0xF600 //TX_THR_SN_EST_2
-245 0xF400 //TX_THR_SN_EST_3
-246 0xF400 //TX_THR_SN_EST_4
-247 0xF400 //TX_THR_SN_EST_5
-248 0xF400 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0000 //TX_DELTA_THR_SN_EST_0
-251 0x0200 //TX_DELTA_THR_SN_EST_1
-252 0x0200 //TX_DELTA_THR_SN_EST_2
-253 0x0200 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0000 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x6000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x6000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x1000 //TX_B_POST_FLT_0
-280 0x1000 //TX_B_POST_FLT_1
-281 0x000B //TX_NS_LVL_CTRL_0
-282 0x0011 //TX_NS_LVL_CTRL_1
-283 0x000F //TX_NS_LVL_CTRL_2
-284 0x000F //TX_NS_LVL_CTRL_3
-285 0x000F //TX_NS_LVL_CTRL_4
-286 0x000F //TX_NS_LVL_CTRL_5
-287 0x000F //TX_NS_LVL_CTRL_6
-288 0x0011 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000F //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000C //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x000C //TX_MIN_GAIN_S_6
-296 0x000F //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7FFF //TX_SNRI_SUP_0
-301 0x7FFF //TX_SNRI_SUP_1
-302 0x7FFF //TX_SNRI_SUP_2
-303 0x7FFF //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x7FFF //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x000E //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x2000 //TX_A_POST_FILT_S_0
-315 0x5000 //TX_A_POST_FILT_S_1
-316 0x5000 //TX_A_POST_FILT_S_2
-317 0x5000 //TX_A_POST_FILT_S_3
-318 0x5000 //TX_A_POST_FILT_S_4
-319 0x5000 //TX_A_POST_FILT_S_5
-320 0x4000 //TX_A_POST_FILT_S_6
-321 0x5000 //TX_A_POST_FILT_S_7
-322 0x1000 //TX_B_POST_FILT_0
-323 0x1000 //TX_B_POST_FILT_1
-324 0x1000 //TX_B_POST_FILT_2
-325 0x1000 //TX_B_POST_FILT_3
-326 0x1000 //TX_B_POST_FILT_4
-327 0x1000 //TX_B_POST_FILT_5
-328 0x1000 //TX_B_POST_FILT_6
-329 0x1000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7900 //TX_LAMBDA_PFILT
-339 0x7B00 //TX_LAMBDA_PFILT_S_0
-340 0x7B00 //TX_LAMBDA_PFILT_S_1
-341 0x7B00 //TX_LAMBDA_PFILT_S_2
-342 0x7B00 //TX_LAMBDA_PFILT_S_3
-343 0x7B00 //TX_LAMBDA_PFILT_S_4
-344 0x7B00 //TX_LAMBDA_PFILT_S_5
-345 0x7B00 //TX_LAMBDA_PFILT_S_6
-346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0000 //TX_K_PEPPER
-348 0x0800 //TX_A_PEPPER
-349 0x1EAA //TX_K_PEPPER_HF
-350 0x0800 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0000 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0050 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x07D0 //TX_NOISE_TH_1
-371 0x00C8 //TX_NOISE_TH_2
-372 0x3A98 //TX_NOISE_TH_3
-373 0x0FA0 //TX_NOISE_TH_4
-374 0x157C //TX_NOISE_TH_5
-375 0x7FFF //TX_NOISE_TH_5_2
-376 0x7FFF //TX_NOISE_TH_5_3
-377 0x7FFF //TX_NOISE_TH_5_4
-378 0x044C //TX_NOISE_TH_6
-379 0x0014 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0014 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x2900 //TX_MIN_G_CTRL_SSNS
-409 0x0800 //TX_METAL_RTO_THR
-410 0x4848 //TX_NS_FP_K_METAL
-411 0x3A98 //TX_NOISEDET_BOOST_TH
-412 0x0FA0 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x01E0 //TX_NOR_OFF_THR
-498 0x7C00 //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x122E //TX_DR_RESRV_7
-527 0x1100 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x0020 //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4848 //TX_FDEQ_GAIN_7
-575 0x4848 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0303 //TX_FDEQ_BIN_2
-594 0x0304 //TX_FDEQ_BIN_3
-595 0x0405 //TX_FDEQ_BIN_4
-596 0x0506 //TX_FDEQ_BIN_5
-597 0x0708 //TX_FDEQ_BIN_6
-598 0x090A //TX_FDEQ_BIN_7
-599 0x0B0C //TX_FDEQ_BIN_8
-600 0x0D0E //TX_FDEQ_BIN_9
-601 0x1013 //TX_FDEQ_BIN_10
-602 0x1719 //TX_FDEQ_BIN_11
-603 0x1B1E //TX_FDEQ_BIN_12
-604 0x1E1E //TX_FDEQ_BIN_13
-605 0x1E28 //TX_FDEQ_BIN_14
-606 0x282C //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4868 //TX_PREEQ_GAIN_MIC0_8
-626 0x6860 //TX_PREEQ_GAIN_MIC0_9
-627 0x6048 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0E10 //TX_PREEQ_BIN_MIC0_0
-642 0x1010 //TX_PREEQ_BIN_MIC0_1
-643 0x1010 //TX_PREEQ_BIN_MIC0_2
-644 0x1010 //TX_PREEQ_BIN_MIC0_3
-645 0x1010 //TX_PREEQ_BIN_MIC0_4
-646 0x1010 //TX_PREEQ_BIN_MIC0_5
-647 0x1010 //TX_PREEQ_BIN_MIC0_6
-648 0x1010 //TX_PREEQ_BIN_MIC0_7
-649 0x1010 //TX_PREEQ_BIN_MIC0_8
-650 0x1010 //TX_PREEQ_BIN_MIC0_9
-651 0x1010 //TX_PREEQ_BIN_MIC0_10
-652 0x1010 //TX_PREEQ_BIN_MIC0_11
-653 0x1010 //TX_PREEQ_BIN_MIC0_12
-654 0x1010 //TX_PREEQ_BIN_MIC0_13
-655 0x1010 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0E10 //TX_PREEQ_BIN_MIC1_0
-691 0x1010 //TX_PREEQ_BIN_MIC1_1
-692 0x1010 //TX_PREEQ_BIN_MIC1_2
-693 0x1010 //TX_PREEQ_BIN_MIC1_3
-694 0x1010 //TX_PREEQ_BIN_MIC1_4
-695 0x1010 //TX_PREEQ_BIN_MIC1_5
-696 0x1010 //TX_PREEQ_BIN_MIC1_6
-697 0x1010 //TX_PREEQ_BIN_MIC1_7
-698 0x1010 //TX_PREEQ_BIN_MIC1_8
-699 0x1010 //TX_PREEQ_BIN_MIC1_9
-700 0x1010 //TX_PREEQ_BIN_MIC1_10
-701 0x1010 //TX_PREEQ_BIN_MIC1_11
-702 0x1010 //TX_PREEQ_BIN_MIC1_12
-703 0x1010 //TX_PREEQ_BIN_MIC1_13
-704 0x1010 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0E10 //TX_PREEQ_BIN_MIC2_0
-740 0x1010 //TX_PREEQ_BIN_MIC2_1
-741 0x1010 //TX_PREEQ_BIN_MIC2_2
-742 0x1010 //TX_PREEQ_BIN_MIC2_3
-743 0x1010 //TX_PREEQ_BIN_MIC2_4
-744 0x1010 //TX_PREEQ_BIN_MIC2_5
-745 0x1010 //TX_PREEQ_BIN_MIC2_6
-746 0x1010 //TX_PREEQ_BIN_MIC2_7
-747 0x1010 //TX_PREEQ_BIN_MIC2_8
-748 0x1010 //TX_PREEQ_BIN_MIC2_9
-749 0x1010 //TX_PREEQ_BIN_MIC2_10
-750 0x1010 //TX_PREEQ_BIN_MIC2_11
-751 0x1010 //TX_PREEQ_BIN_MIC2_12
-752 0x1010 //TX_PREEQ_BIN_MIC2_13
-753 0x1010 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x0800 //TX_NND_WEIGHT
-765 0x0062 //TX_MIC_CALIBRATION_0
-766 0x0062 //TX_MIC_CALIBRATION_1
-767 0x0062 //TX_MIC_CALIBRATION_2
-768 0x0062 //TX_MIC_CALIBRATION_3
-769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0046 //TX_MIC_PWR_BIAS_1
-771 0x0046 //TX_MIC_PWR_BIAS_2
-772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x000C //TX_GAIN_LIMIT_0
-774 0x000C //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000C //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x3000 //TX_TDDRC_ALPHA_UP_01
-784 0x3000 //TX_TDDRC_ALPHA_UP_02
-785 0x3000 //TX_TDDRC_ALPHA_UP_03
-786 0x3000 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
-792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x4848 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x2000 //TX_TDDRC_THRD_2
-857 0x2000 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x3000 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0970 //TX_TDDRC_DRC_GAIN
-867 0x78D6 //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x1000 //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0x8064 //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0003 //RX_SAMPLINGFREQ_SIG
-3 0x0003 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x0000 //RX_B_PE
-13 0x1800 //RX_THR_PITCH_DET_0
-14 0x1000 //RX_THR_PITCH_DET_1
-15 0x0800 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0400 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0x9000 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0x8064 //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0003 //RX_SAMPLINGFREQ_SIG
-160 0x0003 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x0000 //RX_B_PE
-170 0x1800 //RX_THR_PITCH_DET_0
-171 0x1000 //RX_THR_PITCH_DET_1
-172 0x0800 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0400 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0x9000 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-RESERVE2-VOICE_GENERIC-NB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0008 //TX_OPERATION_MODE_0
-1 0x0008 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2A68 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0000 //TX_SAMPLINGFREQ_SIG
-7 0x0000 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0B0B //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0800 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7D83 //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0080 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x7000 //TX_EAD_THR
-151 0x0800 //TX_THR_RE_EST
-152 0x0800 //TX_MIN_EQ_RE_EST_0
-153 0x0800 //TX_MIN_EQ_RE_EST_1
-154 0x0800 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x0800 //TX_MIN_EQ_RE_EST_6
-159 0x0800 //TX_MIN_EQ_RE_EST_7
-160 0x0800 //TX_MIN_EQ_RE_EST_8
-161 0x0800 //TX_MIN_EQ_RE_EST_9
-162 0x0800 //TX_MIN_EQ_RE_EST_10
-163 0x0800 //TX_MIN_EQ_RE_EST_11
-164 0x0800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
-166 0x2000 //TX_LAMBDA_CB_NLE
-167 0x6000 //TX_C_POST_FLT
-168 0x7000 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7800 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7FFF //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x7FFF //TX_DTD_THR2_0
-205 0x7FFF //TX_DTD_THR2_1
-206 0x7FFF //TX_DTD_THR2_2
-207 0x7FFF //TX_DTD_THR2_3
-208 0x7FFF //TX_DTD_THR2_4
-209 0x7FFF //TX_DTD_THR2_5
-210 0x7FFF //TX_DTD_THR2_6
-211 0x1000 //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x0BB8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x0019 //TX_EPD_OFFSET_00
-233 0x0019 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF400 //TX_THR_SN_EST_0
-243 0xF400 //TX_THR_SN_EST_1
-244 0xF600 //TX_THR_SN_EST_2
-245 0xF400 //TX_THR_SN_EST_3
-246 0xF400 //TX_THR_SN_EST_4
-247 0xF400 //TX_THR_SN_EST_5
-248 0xF400 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0000 //TX_DELTA_THR_SN_EST_0
-251 0x0200 //TX_DELTA_THR_SN_EST_1
-252 0x0200 //TX_DELTA_THR_SN_EST_2
-253 0x0200 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0000 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x6000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x6000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x1000 //TX_B_POST_FLT_0
-280 0x1000 //TX_B_POST_FLT_1
-281 0x000F //TX_NS_LVL_CTRL_0
-282 0x0011 //TX_NS_LVL_CTRL_1
-283 0x000F //TX_NS_LVL_CTRL_2
-284 0x000F //TX_NS_LVL_CTRL_3
-285 0x000F //TX_NS_LVL_CTRL_4
-286 0x000F //TX_NS_LVL_CTRL_5
-287 0x000F //TX_NS_LVL_CTRL_6
-288 0x0011 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000F //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000C //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x000C //TX_MIN_GAIN_S_6
-296 0x000F //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7FFF //TX_SNRI_SUP_0
-301 0x7FFF //TX_SNRI_SUP_1
-302 0x7FFF //TX_SNRI_SUP_2
-303 0x7FFF //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x7FFF //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x000E //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x4000 //TX_A_POST_FILT_S_0
-315 0x5000 //TX_A_POST_FILT_S_1
-316 0x5000 //TX_A_POST_FILT_S_2
-317 0x5000 //TX_A_POST_FILT_S_3
-318 0x5000 //TX_A_POST_FILT_S_4
-319 0x5000 //TX_A_POST_FILT_S_5
-320 0x4000 //TX_A_POST_FILT_S_6
-321 0x5000 //TX_A_POST_FILT_S_7
-322 0x1000 //TX_B_POST_FILT_0
-323 0x1000 //TX_B_POST_FILT_1
-324 0x1000 //TX_B_POST_FILT_2
-325 0x1000 //TX_B_POST_FILT_3
-326 0x1000 //TX_B_POST_FILT_4
-327 0x1000 //TX_B_POST_FILT_5
-328 0x1000 //TX_B_POST_FILT_6
-329 0x1000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
-339 0x7B00 //TX_LAMBDA_PFILT_S_0
-340 0x7B00 //TX_LAMBDA_PFILT_S_1
-341 0x7B00 //TX_LAMBDA_PFILT_S_2
-342 0x7B00 //TX_LAMBDA_PFILT_S_3
-343 0x7B00 //TX_LAMBDA_PFILT_S_4
-344 0x7B00 //TX_LAMBDA_PFILT_S_5
-345 0x7B00 //TX_LAMBDA_PFILT_S_6
-346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
-348 0x0800 //TX_A_PEPPER
-349 0x1EAA //TX_K_PEPPER_HF
-350 0x0800 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0050 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x07D0 //TX_NOISE_TH_1
-371 0x00C8 //TX_NOISE_TH_2
-372 0x3A98 //TX_NOISE_TH_3
-373 0x0FA0 //TX_NOISE_TH_4
-374 0x157C //TX_NOISE_TH_5
-375 0x7FFF //TX_NOISE_TH_5_2
-376 0x7FFF //TX_NOISE_TH_5_3
-377 0x7FFF //TX_NOISE_TH_5_4
-378 0x044C //TX_NOISE_TH_6
-379 0x0014 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0014 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x7FFF //TX_MIN_G_CTRL_SSNS
-409 0x0000 //TX_METAL_RTO_THR
-410 0x0000 //TX_NS_FP_K_METAL
-411 0x7FFF //TX_NOISEDET_BOOST_TH
-412 0x0000 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x0230 //TX_NOR_OFF_THR
-498 0x0CCD //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x122E //TX_DR_RESRV_7
-527 0x1100 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x001C //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4242 //TX_FDEQ_GAIN_6
-574 0x423C //TX_FDEQ_GAIN_7
-575 0x3C3C //TX_FDEQ_GAIN_8
-576 0x3434 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0303 //TX_FDEQ_BIN_2
-594 0x0304 //TX_FDEQ_BIN_3
-595 0x0405 //TX_FDEQ_BIN_4
-596 0x0506 //TX_FDEQ_BIN_5
-597 0x0708 //TX_FDEQ_BIN_6
-598 0x090A //TX_FDEQ_BIN_7
-599 0x0B0C //TX_FDEQ_BIN_8
-600 0x0D0E //TX_FDEQ_BIN_9
-601 0x0E0F //TX_FDEQ_BIN_10
-602 0x0F10 //TX_FDEQ_BIN_11
-603 0x1011 //TX_FDEQ_BIN_12
-604 0x1104 //TX_FDEQ_BIN_13
-605 0x0000 //TX_FDEQ_BIN_14
-606 0x0000 //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0608 //TX_PREEQ_BIN_MIC0_0
-642 0x0808 //TX_PREEQ_BIN_MIC0_1
-643 0x0808 //TX_PREEQ_BIN_MIC0_2
-644 0x0808 //TX_PREEQ_BIN_MIC0_3
-645 0x0808 //TX_PREEQ_BIN_MIC0_4
-646 0x0808 //TX_PREEQ_BIN_MIC0_5
-647 0x0808 //TX_PREEQ_BIN_MIC0_6
-648 0x0808 //TX_PREEQ_BIN_MIC0_7
-649 0x0808 //TX_PREEQ_BIN_MIC0_8
-650 0x0808 //TX_PREEQ_BIN_MIC0_9
-651 0x0808 //TX_PREEQ_BIN_MIC0_10
-652 0x0808 //TX_PREEQ_BIN_MIC0_11
-653 0x0808 //TX_PREEQ_BIN_MIC0_12
-654 0x0808 //TX_PREEQ_BIN_MIC0_13
-655 0x0808 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0608 //TX_PREEQ_BIN_MIC1_0
-691 0x0808 //TX_PREEQ_BIN_MIC1_1
-692 0x0808 //TX_PREEQ_BIN_MIC1_2
-693 0x0808 //TX_PREEQ_BIN_MIC1_3
-694 0x0808 //TX_PREEQ_BIN_MIC1_4
-695 0x0808 //TX_PREEQ_BIN_MIC1_5
-696 0x0808 //TX_PREEQ_BIN_MIC1_6
-697 0x0808 //TX_PREEQ_BIN_MIC1_7
-698 0x0808 //TX_PREEQ_BIN_MIC1_8
-699 0x0808 //TX_PREEQ_BIN_MIC1_9
-700 0x0808 //TX_PREEQ_BIN_MIC1_10
-701 0x0808 //TX_PREEQ_BIN_MIC1_11
-702 0x0808 //TX_PREEQ_BIN_MIC1_12
-703 0x0808 //TX_PREEQ_BIN_MIC1_13
-704 0x0808 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0608 //TX_PREEQ_BIN_MIC2_0
-740 0x0808 //TX_PREEQ_BIN_MIC2_1
-741 0x0808 //TX_PREEQ_BIN_MIC2_2
-742 0x0808 //TX_PREEQ_BIN_MIC2_3
-743 0x0808 //TX_PREEQ_BIN_MIC2_4
-744 0x0808 //TX_PREEQ_BIN_MIC2_5
-745 0x0808 //TX_PREEQ_BIN_MIC2_6
-746 0x0808 //TX_PREEQ_BIN_MIC2_7
-747 0x0808 //TX_PREEQ_BIN_MIC2_8
-748 0x0808 //TX_PREEQ_BIN_MIC2_9
-749 0x0808 //TX_PREEQ_BIN_MIC2_10
-750 0x0808 //TX_PREEQ_BIN_MIC2_11
-751 0x0808 //TX_PREEQ_BIN_MIC2_12
-752 0x0808 //TX_PREEQ_BIN_MIC2_13
-753 0x0808 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x0800 //TX_NND_WEIGHT
-765 0x0062 //TX_MIC_CALIBRATION_0
-766 0x0062 //TX_MIC_CALIBRATION_1
-767 0x0062 //TX_MIC_CALIBRATION_2
-768 0x0062 //TX_MIC_CALIBRATION_3
-769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0046 //TX_MIC_PWR_BIAS_1
-771 0x0046 //TX_MIC_PWR_BIAS_2
-772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x000C //TX_GAIN_LIMIT_0
-774 0x000C //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000C //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x1000 //TX_TDDRC_ALPHA_UP_01
-784 0x1000 //TX_TDDRC_ALPHA_UP_02
-785 0x1000 //TX_TDDRC_ALPHA_UP_03
-786 0x1000 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
-792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x0000 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x2000 //TX_TDDRC_THRD_2
-857 0x2000 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x1000 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x07F2 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x00C8 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7FFF //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0xA06C //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0000 //RX_SAMPLINGFREQ_SIG
-3 0x0000 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x0000 //RX_B_PE
-13 0x3800 //RX_THR_PITCH_DET_0
-14 0x3000 //RX_THR_PITCH_DET_1
-15 0x2800 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0600 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0xF800 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7EB8 //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x017F //RX_TDDRC_DRC_GAIN
-38 0x0014 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4444 //RX_FDEQ_GAIN_6
-46 0x4040 //RX_FDEQ_GAIN_7
-47 0x4040 //RX_FDEQ_GAIN_8
-48 0x4040 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0000 //RX_FDEQ_BIN_10
-74 0x0000 //RX_FDEQ_BIN_11
-75 0x0000 //RX_FDEQ_BIN_12
-76 0x0000 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0xA06C //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0000 //RX_SAMPLINGFREQ_SIG
-160 0x0000 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x0000 //RX_B_PE
-170 0x3800 //RX_THR_PITCH_DET_0
-171 0x3000 //RX_THR_PITCH_DET_1
-172 0x2800 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0600 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0xF800 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7EB8 //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x017F //RX_TDDRC_DRC_GAIN
-195 0x0014 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4444 //RX_FDEQ_GAIN_6
-203 0x4040 //RX_FDEQ_GAIN_7
-204 0x4040 //RX_FDEQ_GAIN_8
-205 0x4040 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0000 //RX_FDEQ_BIN_10
-231 0x0000 //RX_FDEQ_BIN_11
-232 0x0000 //RX_FDEQ_BIN_12
-233 0x0000 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-RESERVE2-VOICE_GENERIC-WB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0008 //TX_OPERATION_MODE_0
-1 0x0008 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2A68 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0001 //TX_SAMPLINGFREQ_SIG
-7 0x0001 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0A6D //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0800 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7D83 //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0080 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x7000 //TX_EAD_THR
-151 0x0800 //TX_THR_RE_EST
-152 0x0800 //TX_MIN_EQ_RE_EST_0
-153 0x0800 //TX_MIN_EQ_RE_EST_1
-154 0x0800 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x0800 //TX_MIN_EQ_RE_EST_6
-159 0x0800 //TX_MIN_EQ_RE_EST_7
-160 0x0800 //TX_MIN_EQ_RE_EST_8
-161 0x0800 //TX_MIN_EQ_RE_EST_9
-162 0x0800 //TX_MIN_EQ_RE_EST_10
-163 0x0800 //TX_MIN_EQ_RE_EST_11
-164 0x0800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
-166 0x2000 //TX_LAMBDA_CB_NLE
-167 0x6000 //TX_C_POST_FLT
-168 0x7000 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7800 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7FFF //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x7FFF //TX_DTD_THR2_0
-205 0x7FFF //TX_DTD_THR2_1
-206 0x7FFF //TX_DTD_THR2_2
-207 0x7FFF //TX_DTD_THR2_3
-208 0x7FFF //TX_DTD_THR2_4
-209 0x7FFF //TX_DTD_THR2_5
-210 0x7FFF //TX_DTD_THR2_6
-211 0x1000 //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x0BB8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x0019 //TX_EPD_OFFSET_00
-233 0x0019 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF400 //TX_THR_SN_EST_0
-243 0xF400 //TX_THR_SN_EST_1
-244 0xF600 //TX_THR_SN_EST_2
-245 0xF400 //TX_THR_SN_EST_3
-246 0xF400 //TX_THR_SN_EST_4
-247 0xF400 //TX_THR_SN_EST_5
-248 0xF400 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0000 //TX_DELTA_THR_SN_EST_0
-251 0x0200 //TX_DELTA_THR_SN_EST_1
-252 0x0200 //TX_DELTA_THR_SN_EST_2
-253 0x0200 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0000 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x6000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x6000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x1000 //TX_B_POST_FLT_0
-280 0x1000 //TX_B_POST_FLT_1
-281 0x000F //TX_NS_LVL_CTRL_0
-282 0x0011 //TX_NS_LVL_CTRL_1
-283 0x000F //TX_NS_LVL_CTRL_2
-284 0x000F //TX_NS_LVL_CTRL_3
-285 0x000F //TX_NS_LVL_CTRL_4
-286 0x000F //TX_NS_LVL_CTRL_5
-287 0x000F //TX_NS_LVL_CTRL_6
-288 0x0011 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000F //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000C //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x000C //TX_MIN_GAIN_S_6
-296 0x000F //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7FFF //TX_SNRI_SUP_0
-301 0x7FFF //TX_SNRI_SUP_1
-302 0x7FFF //TX_SNRI_SUP_2
-303 0x7FFF //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x7FFF //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x000E //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x4000 //TX_A_POST_FILT_S_0
-315 0x5000 //TX_A_POST_FILT_S_1
-316 0x5000 //TX_A_POST_FILT_S_2
-317 0x5000 //TX_A_POST_FILT_S_3
-318 0x5000 //TX_A_POST_FILT_S_4
-319 0x5000 //TX_A_POST_FILT_S_5
-320 0x4000 //TX_A_POST_FILT_S_6
-321 0x5000 //TX_A_POST_FILT_S_7
-322 0x1000 //TX_B_POST_FILT_0
-323 0x1000 //TX_B_POST_FILT_1
-324 0x1000 //TX_B_POST_FILT_2
-325 0x1000 //TX_B_POST_FILT_3
-326 0x1000 //TX_B_POST_FILT_4
-327 0x1000 //TX_B_POST_FILT_5
-328 0x1000 //TX_B_POST_FILT_6
-329 0x1000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
-339 0x7B00 //TX_LAMBDA_PFILT_S_0
-340 0x7B00 //TX_LAMBDA_PFILT_S_1
-341 0x7B00 //TX_LAMBDA_PFILT_S_2
-342 0x7B00 //TX_LAMBDA_PFILT_S_3
-343 0x7B00 //TX_LAMBDA_PFILT_S_4
-344 0x7B00 //TX_LAMBDA_PFILT_S_5
-345 0x7B00 //TX_LAMBDA_PFILT_S_6
-346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
-348 0x0800 //TX_A_PEPPER
-349 0x1EAA //TX_K_PEPPER_HF
-350 0x0800 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0050 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x07D0 //TX_NOISE_TH_1
-371 0x00C8 //TX_NOISE_TH_2
-372 0x3A98 //TX_NOISE_TH_3
-373 0x0FA0 //TX_NOISE_TH_4
-374 0x157C //TX_NOISE_TH_5
-375 0x7FFF //TX_NOISE_TH_5_2
-376 0x7FFF //TX_NOISE_TH_5_3
-377 0x7FFF //TX_NOISE_TH_5_4
-378 0x044C //TX_NOISE_TH_6
-379 0x0014 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0014 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x7FFF //TX_MIN_G_CTRL_SSNS
-409 0x0000 //TX_METAL_RTO_THR
-410 0x0000 //TX_NS_FP_K_METAL
-411 0x7FFF //TX_NOISEDET_BOOST_TH
-412 0x0000 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x0230 //TX_NOR_OFF_THR
-498 0x0CCD //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x122E //TX_DR_RESRV_7
-527 0x1100 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x001C //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4444 //TX_FDEQ_GAIN_7
-575 0x4444 //TX_FDEQ_GAIN_8
-576 0x3C3C //TX_FDEQ_GAIN_9
-577 0x3C3C //TX_FDEQ_GAIN_10
-578 0x3C3C //TX_FDEQ_GAIN_11
-579 0x3C30 //TX_FDEQ_GAIN_12
-580 0x3030 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0303 //TX_FDEQ_BIN_2
-594 0x0304 //TX_FDEQ_BIN_3
-595 0x0405 //TX_FDEQ_BIN_4
-596 0x0506 //TX_FDEQ_BIN_5
-597 0x0708 //TX_FDEQ_BIN_6
-598 0x090A //TX_FDEQ_BIN_7
-599 0x0B0C //TX_FDEQ_BIN_8
-600 0x0D0E //TX_FDEQ_BIN_9
-601 0x0E0F //TX_FDEQ_BIN_10
-602 0x0F10 //TX_FDEQ_BIN_11
-603 0x1011 //TX_FDEQ_BIN_12
-604 0x1112 //TX_FDEQ_BIN_13
-605 0x0000 //TX_FDEQ_BIN_14
-606 0x0000 //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0608 //TX_PREEQ_BIN_MIC0_0
-642 0x0808 //TX_PREEQ_BIN_MIC0_1
-643 0x0808 //TX_PREEQ_BIN_MIC0_2
-644 0x0808 //TX_PREEQ_BIN_MIC0_3
-645 0x0808 //TX_PREEQ_BIN_MIC0_4
-646 0x0808 //TX_PREEQ_BIN_MIC0_5
-647 0x0808 //TX_PREEQ_BIN_MIC0_6
-648 0x0808 //TX_PREEQ_BIN_MIC0_7
-649 0x0808 //TX_PREEQ_BIN_MIC0_8
-650 0x0808 //TX_PREEQ_BIN_MIC0_9
-651 0x0808 //TX_PREEQ_BIN_MIC0_10
-652 0x0808 //TX_PREEQ_BIN_MIC0_11
-653 0x0808 //TX_PREEQ_BIN_MIC0_12
-654 0x0808 //TX_PREEQ_BIN_MIC0_13
-655 0x0808 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0608 //TX_PREEQ_BIN_MIC1_0
-691 0x0808 //TX_PREEQ_BIN_MIC1_1
-692 0x0808 //TX_PREEQ_BIN_MIC1_2
-693 0x0808 //TX_PREEQ_BIN_MIC1_3
-694 0x0808 //TX_PREEQ_BIN_MIC1_4
-695 0x0808 //TX_PREEQ_BIN_MIC1_5
-696 0x0808 //TX_PREEQ_BIN_MIC1_6
-697 0x0808 //TX_PREEQ_BIN_MIC1_7
-698 0x0808 //TX_PREEQ_BIN_MIC1_8
-699 0x0808 //TX_PREEQ_BIN_MIC1_9
-700 0x0808 //TX_PREEQ_BIN_MIC1_10
-701 0x0808 //TX_PREEQ_BIN_MIC1_11
-702 0x0808 //TX_PREEQ_BIN_MIC1_12
-703 0x0808 //TX_PREEQ_BIN_MIC1_13
-704 0x0808 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0608 //TX_PREEQ_BIN_MIC2_0
-740 0x0808 //TX_PREEQ_BIN_MIC2_1
-741 0x0808 //TX_PREEQ_BIN_MIC2_2
-742 0x0808 //TX_PREEQ_BIN_MIC2_3
-743 0x0808 //TX_PREEQ_BIN_MIC2_4
-744 0x0808 //TX_PREEQ_BIN_MIC2_5
-745 0x0808 //TX_PREEQ_BIN_MIC2_6
-746 0x0808 //TX_PREEQ_BIN_MIC2_7
-747 0x0808 //TX_PREEQ_BIN_MIC2_8
-748 0x0808 //TX_PREEQ_BIN_MIC2_9
-749 0x0808 //TX_PREEQ_BIN_MIC2_10
-750 0x0808 //TX_PREEQ_BIN_MIC2_11
-751 0x0808 //TX_PREEQ_BIN_MIC2_12
-752 0x0808 //TX_PREEQ_BIN_MIC2_13
-753 0x0808 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x0800 //TX_NND_WEIGHT
-765 0x0062 //TX_MIC_CALIBRATION_0
-766 0x0062 //TX_MIC_CALIBRATION_1
-767 0x0062 //TX_MIC_CALIBRATION_2
-768 0x0062 //TX_MIC_CALIBRATION_3
-769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0046 //TX_MIC_PWR_BIAS_1
-771 0x0046 //TX_MIC_PWR_BIAS_2
-772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x000C //TX_GAIN_LIMIT_0
-774 0x000C //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000C //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x1000 //TX_TDDRC_ALPHA_UP_01
-784 0x1000 //TX_TDDRC_ALPHA_UP_02
-785 0x1000 //TX_TDDRC_ALPHA_UP_03
-786 0x1000 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
-792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x0000 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x2000 //TX_TDDRC_THRD_2
-857 0x2000 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x1000 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x07F2 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x00C8 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7FFF //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0xA06C //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0001 //RX_SAMPLINGFREQ_SIG
-3 0x0001 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x3800 //RX_THR_PITCH_DET_0
-14 0x3000 //RX_THR_PITCH_DET_1
-15 0x2800 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0600 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0xF800 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0001 //RX_TDDRC_THRD_0
-113 0x0001 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7E70 //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x001C //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x3C3C //RX_FDEQ_GAIN_9
-49 0x3C3C //RX_FDEQ_GAIN_10
-50 0x3838 //RX_FDEQ_GAIN_11
-51 0x3838 //RX_FDEQ_GAIN_12
-52 0x3030 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x0E0F //RX_FDEQ_BIN_10
-74 0x0F10 //RX_FDEQ_BIN_11
-75 0x1011 //RX_FDEQ_BIN_12
-76 0x1112 //RX_FDEQ_BIN_13
-77 0x0000 //RX_FDEQ_BIN_14
-78 0x0000 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0xA06C //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0001 //RX_SAMPLINGFREQ_SIG
-160 0x0001 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x3800 //RX_THR_PITCH_DET_0
-171 0x3000 //RX_THR_PITCH_DET_1
-172 0x2800 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0600 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0xF800 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0001 //RX_TDDRC_THRD_0
-270 0x0001 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7E70 //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x001C //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x3C3C //RX_FDEQ_GAIN_9
-206 0x3C3C //RX_FDEQ_GAIN_10
-207 0x3838 //RX_FDEQ_GAIN_11
-208 0x3838 //RX_FDEQ_GAIN_12
-209 0x3030 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x0E0F //RX_FDEQ_BIN_10
-231 0x0F10 //RX_FDEQ_BIN_11
-232 0x1011 //RX_FDEQ_BIN_12
-233 0x1112 //RX_FDEQ_BIN_13
-234 0x0000 //RX_FDEQ_BIN_14
-235 0x0000 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-RESERVE2-VOICE_GENERIC-SWB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0001 //TX_OPERATION_MODE_0
-1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2A28 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0003 //TX_SAMPLINGFREQ_SIG
-7 0x0003 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0915 //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0800 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7EFF //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x1800 //TX_THR_PITCH_DET_0
-131 0x1000 //TX_THR_PITCH_DET_1
-132 0x0800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0080 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x7000 //TX_EAD_THR
-151 0x0800 //TX_THR_RE_EST
-152 0x0800 //TX_MIN_EQ_RE_EST_0
-153 0x0800 //TX_MIN_EQ_RE_EST_1
-154 0x0800 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x0800 //TX_MIN_EQ_RE_EST_6
-159 0x0800 //TX_MIN_EQ_RE_EST_7
-160 0x0800 //TX_MIN_EQ_RE_EST_8
-161 0x0800 //TX_MIN_EQ_RE_EST_9
-162 0x0800 //TX_MIN_EQ_RE_EST_10
-163 0x0800 //TX_MIN_EQ_RE_EST_11
-164 0x0800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
-166 0x2000 //TX_LAMBDA_CB_NLE
-167 0x6000 //TX_C_POST_FLT
-168 0x7000 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7800 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7FFF //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x7FFF //TX_DTD_THR2_0
-205 0x7FFF //TX_DTD_THR2_1
-206 0x7FFF //TX_DTD_THR2_2
-207 0x7FFF //TX_DTD_THR2_3
-208 0x7FFF //TX_DTD_THR2_4
-209 0x7FFF //TX_DTD_THR2_5
-210 0x7FFF //TX_DTD_THR2_6
-211 0x1000 //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x0BB8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00F0 //TX_EPD_OFFSET_00
-233 0x00F0 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF400 //TX_THR_SN_EST_0
-243 0xF400 //TX_THR_SN_EST_1
-244 0xF600 //TX_THR_SN_EST_2
-245 0xF400 //TX_THR_SN_EST_3
-246 0xF400 //TX_THR_SN_EST_4
-247 0xF400 //TX_THR_SN_EST_5
-248 0xF400 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0000 //TX_DELTA_THR_SN_EST_0
-251 0x0200 //TX_DELTA_THR_SN_EST_1
-252 0x0200 //TX_DELTA_THR_SN_EST_2
-253 0x0200 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0000 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x6000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x6000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x1000 //TX_B_POST_FLT_0
-280 0x1000 //TX_B_POST_FLT_1
-281 0x000B //TX_NS_LVL_CTRL_0
-282 0x0011 //TX_NS_LVL_CTRL_1
-283 0x000F //TX_NS_LVL_CTRL_2
-284 0x000F //TX_NS_LVL_CTRL_3
-285 0x000F //TX_NS_LVL_CTRL_4
-286 0x000F //TX_NS_LVL_CTRL_5
-287 0x000F //TX_NS_LVL_CTRL_6
-288 0x0011 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000F //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000C //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x000C //TX_MIN_GAIN_S_6
-296 0x000F //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7FFF //TX_SNRI_SUP_0
-301 0x7FFF //TX_SNRI_SUP_1
-302 0x7FFF //TX_SNRI_SUP_2
-303 0x7FFF //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x7FFF //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x000E //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x2000 //TX_A_POST_FILT_S_0
-315 0x5000 //TX_A_POST_FILT_S_1
-316 0x5000 //TX_A_POST_FILT_S_2
-317 0x5000 //TX_A_POST_FILT_S_3
-318 0x5000 //TX_A_POST_FILT_S_4
-319 0x5000 //TX_A_POST_FILT_S_5
-320 0x4000 //TX_A_POST_FILT_S_6
-321 0x5000 //TX_A_POST_FILT_S_7
-322 0x1000 //TX_B_POST_FILT_0
-323 0x1000 //TX_B_POST_FILT_1
-324 0x1000 //TX_B_POST_FILT_2
-325 0x1000 //TX_B_POST_FILT_3
-326 0x1000 //TX_B_POST_FILT_4
-327 0x1000 //TX_B_POST_FILT_5
-328 0x1000 //TX_B_POST_FILT_6
-329 0x1000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7900 //TX_LAMBDA_PFILT
-339 0x7B00 //TX_LAMBDA_PFILT_S_0
-340 0x7B00 //TX_LAMBDA_PFILT_S_1
-341 0x7B00 //TX_LAMBDA_PFILT_S_2
-342 0x7B00 //TX_LAMBDA_PFILT_S_3
-343 0x7B00 //TX_LAMBDA_PFILT_S_4
-344 0x7B00 //TX_LAMBDA_PFILT_S_5
-345 0x7B00 //TX_LAMBDA_PFILT_S_6
-346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0000 //TX_K_PEPPER
-348 0x0800 //TX_A_PEPPER
-349 0x1EAA //TX_K_PEPPER_HF
-350 0x0800 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0050 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x07D0 //TX_NOISE_TH_1
-371 0x00C8 //TX_NOISE_TH_2
-372 0x3A98 //TX_NOISE_TH_3
-373 0x0FA0 //TX_NOISE_TH_4
-374 0x157C //TX_NOISE_TH_5
-375 0x7FFF //TX_NOISE_TH_5_2
-376 0x7FFF //TX_NOISE_TH_5_3
-377 0x7FFF //TX_NOISE_TH_5_4
-378 0x044C //TX_NOISE_TH_6
-379 0x0014 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0014 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x2900 //TX_MIN_G_CTRL_SSNS
-409 0x0800 //TX_METAL_RTO_THR
-410 0x4848 //TX_NS_FP_K_METAL
-411 0x3A98 //TX_NOISEDET_BOOST_TH
-412 0x0FA0 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x01E0 //TX_NOR_OFF_THR
-498 0x7C00 //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x122E //TX_DR_RESRV_7
-527 0x1100 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x0020 //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4848 //TX_FDEQ_GAIN_7
-575 0x4848 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0303 //TX_FDEQ_BIN_2
-594 0x0304 //TX_FDEQ_BIN_3
-595 0x0405 //TX_FDEQ_BIN_4
-596 0x0506 //TX_FDEQ_BIN_5
-597 0x0708 //TX_FDEQ_BIN_6
-598 0x090A //TX_FDEQ_BIN_7
-599 0x0B0C //TX_FDEQ_BIN_8
-600 0x0D0E //TX_FDEQ_BIN_9
-601 0x1013 //TX_FDEQ_BIN_10
-602 0x1719 //TX_FDEQ_BIN_11
-603 0x1B1E //TX_FDEQ_BIN_12
-604 0x1E1E //TX_FDEQ_BIN_13
-605 0x1E28 //TX_FDEQ_BIN_14
-606 0x282C //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4868 //TX_PREEQ_GAIN_MIC0_8
-626 0x6860 //TX_PREEQ_GAIN_MIC0_9
-627 0x6048 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0E10 //TX_PREEQ_BIN_MIC0_0
-642 0x1010 //TX_PREEQ_BIN_MIC0_1
-643 0x1010 //TX_PREEQ_BIN_MIC0_2
-644 0x1010 //TX_PREEQ_BIN_MIC0_3
-645 0x1010 //TX_PREEQ_BIN_MIC0_4
-646 0x1010 //TX_PREEQ_BIN_MIC0_5
-647 0x1010 //TX_PREEQ_BIN_MIC0_6
-648 0x1010 //TX_PREEQ_BIN_MIC0_7
-649 0x1010 //TX_PREEQ_BIN_MIC0_8
-650 0x1010 //TX_PREEQ_BIN_MIC0_9
-651 0x1010 //TX_PREEQ_BIN_MIC0_10
-652 0x1010 //TX_PREEQ_BIN_MIC0_11
-653 0x1010 //TX_PREEQ_BIN_MIC0_12
-654 0x1010 //TX_PREEQ_BIN_MIC0_13
-655 0x1010 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0E10 //TX_PREEQ_BIN_MIC1_0
-691 0x1010 //TX_PREEQ_BIN_MIC1_1
-692 0x1010 //TX_PREEQ_BIN_MIC1_2
-693 0x1010 //TX_PREEQ_BIN_MIC1_3
-694 0x1010 //TX_PREEQ_BIN_MIC1_4
-695 0x1010 //TX_PREEQ_BIN_MIC1_5
-696 0x1010 //TX_PREEQ_BIN_MIC1_6
-697 0x1010 //TX_PREEQ_BIN_MIC1_7
-698 0x1010 //TX_PREEQ_BIN_MIC1_8
-699 0x1010 //TX_PREEQ_BIN_MIC1_9
-700 0x1010 //TX_PREEQ_BIN_MIC1_10
-701 0x1010 //TX_PREEQ_BIN_MIC1_11
-702 0x1010 //TX_PREEQ_BIN_MIC1_12
-703 0x1010 //TX_PREEQ_BIN_MIC1_13
-704 0x1010 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0E10 //TX_PREEQ_BIN_MIC2_0
-740 0x1010 //TX_PREEQ_BIN_MIC2_1
-741 0x1010 //TX_PREEQ_BIN_MIC2_2
-742 0x1010 //TX_PREEQ_BIN_MIC2_3
-743 0x1010 //TX_PREEQ_BIN_MIC2_4
-744 0x1010 //TX_PREEQ_BIN_MIC2_5
-745 0x1010 //TX_PREEQ_BIN_MIC2_6
-746 0x1010 //TX_PREEQ_BIN_MIC2_7
-747 0x1010 //TX_PREEQ_BIN_MIC2_8
-748 0x1010 //TX_PREEQ_BIN_MIC2_9
-749 0x1010 //TX_PREEQ_BIN_MIC2_10
-750 0x1010 //TX_PREEQ_BIN_MIC2_11
-751 0x1010 //TX_PREEQ_BIN_MIC2_12
-752 0x1010 //TX_PREEQ_BIN_MIC2_13
-753 0x1010 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x0800 //TX_NND_WEIGHT
-765 0x0062 //TX_MIC_CALIBRATION_0
-766 0x0062 //TX_MIC_CALIBRATION_1
-767 0x0062 //TX_MIC_CALIBRATION_2
-768 0x0062 //TX_MIC_CALIBRATION_3
-769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0046 //TX_MIC_PWR_BIAS_1
-771 0x0046 //TX_MIC_PWR_BIAS_2
-772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x000C //TX_GAIN_LIMIT_0
-774 0x000C //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000C //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x3000 //TX_TDDRC_ALPHA_UP_01
-784 0x3000 //TX_TDDRC_ALPHA_UP_02
-785 0x3000 //TX_TDDRC_ALPHA_UP_03
-786 0x3000 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
-792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x4848 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x2000 //TX_TDDRC_THRD_2
-857 0x2000 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x3000 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0970 //TX_TDDRC_DRC_GAIN
-867 0x78D6 //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x1000 //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0xA064 //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0003 //RX_SAMPLINGFREQ_SIG
-3 0x0003 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x0000 //RX_B_PE
-13 0x1800 //RX_THR_PITCH_DET_0
-14 0x1000 //RX_THR_PITCH_DET_1
-15 0x0800 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0400 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0x9000 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0x8064 //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0003 //RX_SAMPLINGFREQ_SIG
-160 0x0003 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x0000 //RX_B_PE
-170 0x1800 //RX_THR_PITCH_DET_0
-171 0x1000 //RX_THR_PITCH_DET_1
-172 0x0800 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0400 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0x9000 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-RESERVE2-VOICE_GENERIC-FB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0009 //TX_OPERATION_MODE_0
-1 0x0009 //TX_OPERATION_MODE_1
-2 0x0020 //TX_PATCH_REG
-3 0x286A //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0004 //TX_SAMPLINGFREQ_SIG
-7 0x0004 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0915 //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0000 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7E56 //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x6800 //TX_THR_PITCH_DET_0
-131 0x6000 //TX_THR_PITCH_DET_1
-132 0x5800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0200 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x6000 //TX_EAD_THR
-151 0x0400 //TX_THR_RE_EST
-152 0x3000 //TX_MIN_EQ_RE_EST_0
-153 0x3000 //TX_MIN_EQ_RE_EST_1
-154 0x4000 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x6000 //TX_MIN_EQ_RE_EST_6
-159 0x6000 //TX_MIN_EQ_RE_EST_7
-160 0x6000 //TX_MIN_EQ_RE_EST_8
-161 0x6000 //TX_MIN_EQ_RE_EST_9
-162 0x4000 //TX_MIN_EQ_RE_EST_10
-163 0x4000 //TX_MIN_EQ_RE_EST_11
-164 0x4000 //TX_MIN_EQ_RE_EST_12
-165 0x3000 //TX_LAMBDA_RE_EST
-166 0x4000 //TX_LAMBDA_CB_NLE
-167 0x3000 //TX_C_POST_FLT
-168 0x4500 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x5000 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7F00 //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x0800 //TX_DTD_THR2_0
-205 0x0800 //TX_DTD_THR2_1
-206 0x0800 //TX_DTD_THR2_2
-207 0x0800 //TX_DTD_THR2_3
-208 0x0800 //TX_DTD_THR2_4
-209 0x0100 //TX_DTD_THR2_5
-210 0x0100 //TX_DTD_THR2_6
-211 0x7FFF //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x03E8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00C0 //TX_EPD_OFFSET_00
-233 0x00C0 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF700 //TX_THR_SN_EST_0
-243 0xFB00 //TX_THR_SN_EST_1
-244 0xFA00 //TX_THR_SN_EST_2
-245 0xF700 //TX_THR_SN_EST_3
-246 0xFA00 //TX_THR_SN_EST_4
-247 0xF600 //TX_THR_SN_EST_5
-248 0xF600 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0200 //TX_DELTA_THR_SN_EST_0
-251 0x0400 //TX_DELTA_THR_SN_EST_1
-252 0x0300 //TX_DELTA_THR_SN_EST_2
-253 0x0600 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0200 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x4000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x4000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x2000 //TX_B_POST_FLT_0
-280 0x2000 //TX_B_POST_FLT_1
-281 0x0012 //TX_NS_LVL_CTRL_0
-282 0x0016 //TX_NS_LVL_CTRL_1
-283 0x0016 //TX_NS_LVL_CTRL_2
-284 0x0019 //TX_NS_LVL_CTRL_3
-285 0x0010 //TX_NS_LVL_CTRL_4
-286 0x0010 //TX_NS_LVL_CTRL_5
-287 0x0019 //TX_NS_LVL_CTRL_6
-288 0x0010 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000C //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000F //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x0011 //TX_MIN_GAIN_S_6
-296 0x000C //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7000 //TX_SNRI_SUP_0
-301 0x7000 //TX_SNRI_SUP_1
-302 0x7000 //TX_SNRI_SUP_2
-303 0x6000 //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x6000 //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x0016 //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x6000 //TX_A_POST_FILT_S_0
-315 0x6000 //TX_A_POST_FILT_S_1
-316 0x6000 //TX_A_POST_FILT_S_2
-317 0x6000 //TX_A_POST_FILT_S_3
-318 0x6000 //TX_A_POST_FILT_S_4
-319 0x6000 //TX_A_POST_FILT_S_5
-320 0x6000 //TX_A_POST_FILT_S_6
-321 0x6000 //TX_A_POST_FILT_S_7
-322 0x2000 //TX_B_POST_FILT_0
-323 0x4000 //TX_B_POST_FILT_1
-324 0x2000 //TX_B_POST_FILT_2
-325 0x2000 //TX_B_POST_FILT_3
-326 0x2000 //TX_B_POST_FILT_4
-327 0x2000 //TX_B_POST_FILT_5
-328 0x2000 //TX_B_POST_FILT_6
-329 0x2000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7CCD //TX_LAMBDA_PFILT
-339 0x7CCD //TX_LAMBDA_PFILT_S_0
-340 0x7CCD //TX_LAMBDA_PFILT_S_1
-341 0x7CCD //TX_LAMBDA_PFILT_S_2
-342 0x7CCD //TX_LAMBDA_PFILT_S_3
-343 0x7CCD //TX_LAMBDA_PFILT_S_4
-344 0x7CCD //TX_LAMBDA_PFILT_S_5
-345 0x7CCD //TX_LAMBDA_PFILT_S_6
-346 0x7CCD //TX_LAMBDA_PFILT_S_7
-347 0x0200 //TX_K_PEPPER
-348 0x0500 //TX_A_PEPPER
-349 0x1600 //TX_K_PEPPER_HF
-350 0x0400 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0020 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x02A6 //TX_NOISE_TH_1
-371 0x04B0 //TX_NOISE_TH_2
-372 0x3194 //TX_NOISE_TH_3
-373 0x0960 //TX_NOISE_TH_4
-374 0x5555 //TX_NOISE_TH_5
-375 0x3FF4 //TX_NOISE_TH_5_2
-376 0x0001 //TX_NOISE_TH_5_3
-377 0x0000 //TX_NOISE_TH_5_4
-378 0x02BC //TX_NOISE_TH_6
-379 0x0020 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0020 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x2900 //TX_MIN_G_CTRL_SSNS
-409 0x0800 //TX_METAL_RTO_THR
-410 0x4848 //TX_NS_FP_K_METAL
-411 0x3A98 //TX_NOISEDET_BOOST_TH
-412 0x0FA0 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x01E0 //TX_NOR_OFF_THR
-498 0x7C00 //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x122E //TX_DR_RESRV_7
-527 0x1100 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x0020 //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4848 //TX_FDEQ_GAIN_7
-575 0x4848 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0304 //TX_FDEQ_BIN_2
-594 0x0405 //TX_FDEQ_BIN_3
-595 0x0607 //TX_FDEQ_BIN_4
-596 0x0809 //TX_FDEQ_BIN_5
-597 0x0A0B //TX_FDEQ_BIN_6
-598 0x0C0D //TX_FDEQ_BIN_7
-599 0x0E0F //TX_FDEQ_BIN_8
-600 0x1011 //TX_FDEQ_BIN_9
-601 0x1214 //TX_FDEQ_BIN_10
-602 0x1618 //TX_FDEQ_BIN_11
-603 0x1C1C //TX_FDEQ_BIN_12
-604 0x2020 //TX_FDEQ_BIN_13
-605 0x2020 //TX_FDEQ_BIN_14
-606 0x2011 //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4848 //TX_PREEQ_GAIN_MIC0_8
-626 0x4848 //TX_PREEQ_GAIN_MIC0_9
-627 0x4848 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0E10 //TX_PREEQ_BIN_MIC0_0
-642 0x1010 //TX_PREEQ_BIN_MIC0_1
-643 0x1010 //TX_PREEQ_BIN_MIC0_2
-644 0x1010 //TX_PREEQ_BIN_MIC0_3
-645 0x1010 //TX_PREEQ_BIN_MIC0_4
-646 0x1010 //TX_PREEQ_BIN_MIC0_5
-647 0x1010 //TX_PREEQ_BIN_MIC0_6
-648 0x1010 //TX_PREEQ_BIN_MIC0_7
-649 0x1010 //TX_PREEQ_BIN_MIC0_8
-650 0x1010 //TX_PREEQ_BIN_MIC0_9
-651 0x1010 //TX_PREEQ_BIN_MIC0_10
-652 0x1010 //TX_PREEQ_BIN_MIC0_11
-653 0x1010 //TX_PREEQ_BIN_MIC0_12
-654 0x1010 //TX_PREEQ_BIN_MIC0_13
-655 0x1010 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0E10 //TX_PREEQ_BIN_MIC1_0
-691 0x1010 //TX_PREEQ_BIN_MIC1_1
-692 0x1010 //TX_PREEQ_BIN_MIC1_2
-693 0x1010 //TX_PREEQ_BIN_MIC1_3
-694 0x1010 //TX_PREEQ_BIN_MIC1_4
-695 0x1010 //TX_PREEQ_BIN_MIC1_5
-696 0x1010 //TX_PREEQ_BIN_MIC1_6
-697 0x1010 //TX_PREEQ_BIN_MIC1_7
-698 0x1010 //TX_PREEQ_BIN_MIC1_8
-699 0x1010 //TX_PREEQ_BIN_MIC1_9
-700 0x1010 //TX_PREEQ_BIN_MIC1_10
-701 0x1010 //TX_PREEQ_BIN_MIC1_11
-702 0x1010 //TX_PREEQ_BIN_MIC1_12
-703 0x1010 //TX_PREEQ_BIN_MIC1_13
-704 0x1010 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0E10 //TX_PREEQ_BIN_MIC2_0
-740 0x1010 //TX_PREEQ_BIN_MIC2_1
-741 0x1010 //TX_PREEQ_BIN_MIC2_2
-742 0x1010 //TX_PREEQ_BIN_MIC2_3
-743 0x1010 //TX_PREEQ_BIN_MIC2_4
-744 0x1010 //TX_PREEQ_BIN_MIC2_5
-745 0x1010 //TX_PREEQ_BIN_MIC2_6
-746 0x1010 //TX_PREEQ_BIN_MIC2_7
-747 0x1010 //TX_PREEQ_BIN_MIC2_8
-748 0x1010 //TX_PREEQ_BIN_MIC2_9
-749 0x1010 //TX_PREEQ_BIN_MIC2_10
-750 0x1010 //TX_PREEQ_BIN_MIC2_11
-751 0x1010 //TX_PREEQ_BIN_MIC2_12
-752 0x1010 //TX_PREEQ_BIN_MIC2_13
-753 0x1010 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x2000 //TX_NND_WEIGHT
-765 0x0060 //TX_MIC_CALIBRATION_0
-766 0x0060 //TX_MIC_CALIBRATION_1
-767 0x0070 //TX_MIC_CALIBRATION_2
-768 0x0070 //TX_MIC_CALIBRATION_3
-769 0x0050 //TX_MIC_PWR_BIAS_0
-770 0x0040 //TX_MIC_PWR_BIAS_1
-771 0x0040 //TX_MIC_PWR_BIAS_2
-772 0x0040 //TX_MIC_PWR_BIAS_3
-773 0x0009 //TX_GAIN_LIMIT_0
-774 0x000F //TX_GAIN_LIMIT_1
-775 0x000F //TX_GAIN_LIMIT_2
-776 0x000F //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x0C00 //TX_TDDRC_ALPHA_UP_01
-784 0x0C00 //TX_TDDRC_ALPHA_UP_02
-785 0x0C00 //TX_TDDRC_ALPHA_UP_03
-786 0x0C00 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
-792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x4848 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0002 //TX_FILTINDX
-854 0x0001 //TX_TDDRC_THRD_0
-855 0x0001 //TX_TDDRC_THRD_1
-856 0x1900 //TX_TDDRC_THRD_2
-857 0x1900 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x7B00 //TX_TDDRC_SLANT_1
-860 0x0C00 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0200 //TX_TDDRC_DRC_GAIN
-867 0x7FFF //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x7000 //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0x2064 //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0004 //RX_SAMPLINGFREQ_SIG
-3 0x0004 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x4000 //RX_B_PE
-13 0x7800 //RX_THR_PITCH_DET_0
-14 0x7000 //RX_THR_PITCH_DET_1
-15 0x6000 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0500 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0xF600 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x1000 //RX_TDDRC_ALPHA_UP_1
-7 0x1000 //RX_TDDRC_ALPHA_UP_2
-8 0x1000 //RX_TDDRC_ALPHA_UP_3
-9 0x1000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x1000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0304 //RX_FDEQ_BIN_2
-66 0x0405 //RX_FDEQ_BIN_3
-67 0x0607 //RX_FDEQ_BIN_4
-68 0x0809 //RX_FDEQ_BIN_5
-69 0x0A0B //RX_FDEQ_BIN_6
-70 0x0C0D //RX_FDEQ_BIN_7
-71 0x0E0F //RX_FDEQ_BIN_8
-72 0x1011 //RX_FDEQ_BIN_9
-73 0x1214 //RX_FDEQ_BIN_10
-74 0x1618 //RX_FDEQ_BIN_11
-75 0x1C1C //RX_FDEQ_BIN_12
-76 0x2020 //RX_FDEQ_BIN_13
-77 0x2020 //RX_FDEQ_BIN_14
-78 0x2011 //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0x0064 //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0004 //RX_SAMPLINGFREQ_SIG
-160 0x0004 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x4000 //RX_B_PE
-170 0x7800 //RX_THR_PITCH_DET_0
-171 0x7000 //RX_THR_PITCH_DET_1
-172 0x6000 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0500 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0xF600 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x1000 //RX_TDDRC_ALPHA_UP_1
-164 0x1000 //RX_TDDRC_ALPHA_UP_2
-165 0x1000 //RX_TDDRC_ALPHA_UP_3
-166 0x1000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x1000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0304 //RX_FDEQ_BIN_2
-223 0x0405 //RX_FDEQ_BIN_3
-224 0x0607 //RX_FDEQ_BIN_4
-225 0x0809 //RX_FDEQ_BIN_5
-226 0x0A0B //RX_FDEQ_BIN_6
-227 0x0C0D //RX_FDEQ_BIN_7
-228 0x0E0F //RX_FDEQ_BIN_8
-229 0x1011 //RX_FDEQ_BIN_9
-230 0x1214 //RX_FDEQ_BIN_10
-231 0x1618 //RX_FDEQ_BIN_11
-232 0x1C1C //RX_FDEQ_BIN_12
-233 0x2020 //RX_FDEQ_BIN_13
-234 0x2020 //RX_FDEQ_BIN_14
-235 0x2011 //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-RESERVE2-RESERVE2-SWB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0 0x0001 //TX_OPERATION_MODE_0
-1 0x0001 //TX_OPERATION_MODE_1
-2 0x0033 //TX_PATCH_REG
-3 0x2A28 //TX_SENDFUNC_MODE_0
-4 0x0001 //TX_SENDFUNC_MODE_1
-5 0x0001 //TX_NUM_MIC
-6 0x0003 //TX_SAMPLINGFREQ_SIG
-7 0x0003 //TX_SAMPLINGFREQ_PROC
-8 0x000A //TX_FRAME_SZ_SIG
-9 0x000A //TX_FRAME_SZ
-10 0x0000 //TX_DELAY_OPT
-11 0x0028 //TX_MAX_TAIL_LENGTH
-12 0x0001 //TX_NUM_LOUTCHN
-13 0x0001 //TX_MAXNUM_AECREF
-14 0x0000 //TX_DBG_FUNC_REG
-15 0x0000 //TX_DBG_FUNC_REG1
-16 0x0000 //TX_SYS_RESRV_0
-17 0x0000 //TX_SYS_RESRV_1
-18 0x0000 //TX_SYS_RESRV_2
-19 0x0000 //TX_SYS_RESRV_3
-20 0x0000 //TX_DIST2REF0
-21 0x009B //TX_DIST2REF1
-22 0x0000 //TX_DIST2REF_02
-23 0x0000 //TX_DIST2REF_03
-24 0x0000 //TX_DIST2REF_04
-25 0x0000 //TX_DIST2REF_05
-26 0x0000 //TX_MMIC
-27 0x0915 //TX_PGA_0
-28 0x0800 //TX_PGA_1
-29 0x0800 //TX_PGA_2
-30 0x0000 //TX_PGA_3
-31 0x0000 //TX_PGA_4
-32 0x0000 //TX_PGA_5
-33 0x0000 //TX_MIC_PAIRS
-34 0x0000 //TX_MIC_PAIRS_HS
-35 0x0002 //TX_MICS_FOR_BF
-36 0x0000 //TX_MIC_PAIRS_FORL1
-37 0x0002 //TX_MICS_OF_PAIR0
-38 0x0002 //TX_MICS_OF_PAIR1
-39 0x0002 //TX_MICS_OF_PAIR2
-40 0x0002 //TX_MICS_OF_PAIR3
-41 0x0000 //TX_MIC_DATA_SRC0
-42 0x0001 //TX_MIC_DATA_SRC1
-43 0x0002 //TX_MIC_DATA_SRC2
-44 0x0000 //TX_MIC_DATA_SRC3
-45 0x0000 //TX_MIC_PAIR_CH_04
-46 0x0000 //TX_MIC_PAIR_CH_05
-47 0x0000 //TX_MIC_PAIR_CH_10
-48 0x0000 //TX_MIC_PAIR_CH_11
-49 0x0000 //TX_MIC_PAIR_CH_12
-50 0x0000 //TX_MIC_PAIR_CH_13
-51 0x0000 //TX_MIC_PAIR_CH_14
-52 0x05DC //TX_HD_BIN_MASK
-53 0x0010 //TX_HD_SUBAND_MASK
-54 0x19A1 //TX_HD_FRAME_AVG_MASK
-55 0x0320 //TX_HD_MIN_FRQ
-56 0x1000 //TX_HD_ALPHA_PSD
-57 0x1100 //TX_T_PHPR1
-58 0x0000 //TX_T_PHPR2
-59 0x0000 //TX_T_PTPR
-60 0x0000 //TX_T_PNPR
-61 0x0000 //TX_T_PAPR1
-62 0xEE6C //TX_T_PSDVAT
-63 0x0800 //TX_CNT
-64 0x4000 //TX_ANTI_HOWL_GAIN
-65 0x0001 //TX_MICFORBFMARK_0
-66 0x0001 //TX_MICFORBFMARK_1
-67 0x0001 //TX_MICFORBFMARK_2
-68 0x0001 //TX_MICFORBFMARK_3
-69 0x0001 //TX_MICFORBFMARK_4
-70 0x0001 //TX_MICFORBFMARK_5
-71 0x0000 //TX_DIST2REF_10
-72 0x3E00 //TX_DIST2REF_11
-73 0x0000 //TX_DIST2REF2
-74 0x0000 //TX_DIST2REF_13
-75 0x0000 //TX_DIST2REF_14
-76 0x0000 //TX_DIST2REF_15
-77 0x0000 //TX_DIST2REF_20
-78 0x0000 //TX_DIST2REF_21
-79 0x0000 //TX_DIST2REF_22
-80 0x0000 //TX_DIST2REF_23
-81 0x0000 //TX_DIST2REF_24
-82 0x0000 //TX_DIST2REF_25
-83 0x0000 //TX_DIST2REF_30
-84 0x0000 //TX_DIST2REF_31
-85 0x0000 //TX_DIST2REF_32
-86 0x0000 //TX_DIST2REF_33
-87 0x0000 //TX_DIST2REF_34
-88 0x0000 //TX_DIST2REF_35
-89 0x0000 //TX_MIC_LOC_00
-90 0x0000 //TX_MIC_LOC_01
-91 0x0000 //TX_MIC_LOC_02
-92 0x0000 //TX_MIC_LOC_03
-93 0x0000 //TX_MIC_LOC_04
-94 0x0000 //TX_MIC_LOC_05
-95 0x0000 //TX_MIC_LOC_10
-96 0x0000 //TX_MIC_LOC_11
-97 0x0000 //TX_MIC_LOC_12
-98 0x0000 //TX_MIC_LOC_13
-99 0x0000 //TX_MIC_LOC_14
-100 0x0000 //TX_MIC_LOC_15
-101 0x0000 //TX_MIC_LOC_20
-102 0x0000 //TX_MIC_LOC_21
-103 0x0000 //TX_MIC_LOC_22
-104 0x0000 //TX_MIC_LOC_23
-105 0x0000 //TX_MIC_LOC_24
-106 0x0000 //TX_MIC_LOC_25
-107 0x0200 //TX_MIC_REFBLK_VOLUME
-108 0x0800 //TX_MIC_BLOCK_VOLUME
-109 0x0000 //TX_INVERSE_MASK
-110 0x0000 //TX_ADCS_MASK
-111 0x04D0 //TX_ADCS_GAIN
-112 0x4000 //TX_NFC_GAINFAC
-113 0x0000 //TX_MAINMIC_BLKFACTOR
-114 0x0000 //TX_REFMIC_BLKFACTOR
-115 0x0000 //TX_BLMIC_BLKFACTOR
-116 0x0000 //TX_BRMIC_BLKFACTOR
-117 0x0031 //TX_MICBLK_START_BIN
-118 0x0060 //TX_MICBLK_END_BIN
-119 0x0015 //TX_MICBLK_FE_HOLD
-120 0xFFF2 //TX_MICBLK_MR_EXP_TH
-121 0xFFF2 //TX_MICBLK_LR_EXP_TH
-122 0x0015 //TX_FENE_HOLD
-123 0x4000 //TX_FE_ENER_TH_MTS
-124 0x0004 //TX_FE_ENER_TH_EXP
-125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
-126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
-127 0x0010 //TX_MIC_BLOCK_N
-128 0x7EFF //TX_A_HP
-129 0x4000 //TX_B_PE
-130 0x1800 //TX_THR_PITCH_DET_0
-131 0x1000 //TX_THR_PITCH_DET_1
-132 0x0800 //TX_THR_PITCH_DET_2
-133 0x0008 //TX_PITCH_BFR_LEN
-134 0x0003 //TX_SBD_PITCH_DET
-135 0x0050 //TX_TD_AEC_L
-136 0x4000 //TX_MU0_UNP_TD_AEC
-137 0x1000 //TX_MU0_PTD_TD_AEC
-138 0x0000 //TX_PP_RESRV_0
-139 0x2A94 //TX_PP_RESRV_1
-140 0x55F0 //TX_PP_RESRV_2
-141 0x0000 //TX_PP_RESRV_3
-142 0x0000 //TX_PP_RESRV_4
-143 0x0000 //TX_PP_RESRV_5
-144 0x0000 //TX_PP_RESRV_6
-145 0x0000 //TX_PP_RESRV_7
-146 0x001E //TX_TAIL_LENGTH
-147 0x0080 //TX_AEC_REF_GAIN_0
-148 0x0800 //TX_AEC_REF_GAIN_1
-149 0x0800 //TX_AEC_REF_GAIN_2
-150 0x7000 //TX_EAD_THR
-151 0x0800 //TX_THR_RE_EST
-152 0x0800 //TX_MIN_EQ_RE_EST_0
-153 0x0800 //TX_MIN_EQ_RE_EST_1
-154 0x0800 //TX_MIN_EQ_RE_EST_2
-155 0x0800 //TX_MIN_EQ_RE_EST_3
-156 0x0800 //TX_MIN_EQ_RE_EST_4
-157 0x0800 //TX_MIN_EQ_RE_EST_5
-158 0x0800 //TX_MIN_EQ_RE_EST_6
-159 0x0800 //TX_MIN_EQ_RE_EST_7
-160 0x0800 //TX_MIN_EQ_RE_EST_8
-161 0x0800 //TX_MIN_EQ_RE_EST_9
-162 0x0800 //TX_MIN_EQ_RE_EST_10
-163 0x0800 //TX_MIN_EQ_RE_EST_11
-164 0x0800 //TX_MIN_EQ_RE_EST_12
-165 0x4000 //TX_LAMBDA_RE_EST
-166 0x2000 //TX_LAMBDA_CB_NLE
-167 0x6000 //TX_C_POST_FLT
-168 0x7000 //TX_GAIN_NP
-169 0x00C8 //TX_SE_HOLD_N
-170 0x00C8 //TX_DT_HOLD_N
-171 0x03E8 //TX_DT2_HOLD_N
-172 0x6666 //TX_AEC_RESRV_0
-173 0x0000 //TX_AEC_RESRV_1
-174 0x0014 //TX_AEC_RESRV_2
-175 0x0000 //TX_MIC_DELAY_LENGTH
-176 0x0000 //TX_REF_DELAY_LENGTH
-177 0x0000 //TX_ADD_LINEIN_GAINL
-178 0x0000 //TX_ADD_LINEIN_GAINH
-179 0x0000 //TX_MIN_EQ_RE_EST_14
-180 0x0000 //TX_DTD_THR1_8
-181 0x7FFF //TX_DTD_THR2_8
-182 0x0000 //TX_DTD_MIC_BLK2
-183 0x0008 //TX_FRQ_LIN_LEN
-184 0x7FFF //TX_FRQ_AEC_LEN_RHO
-185 0x6000 //TX_MU0_UNP_FRQ_AEC
-186 0x4000 //TX_MU0_PTD_FRQ_AEC
-187 0x000A //TX_MINENOISETH
-188 0x0800 //TX_MU0_RE_EST
-189 0x0001 //TX_AEC_NUM_CH
-190 0x0000 //TX_BIGECHOATTENUATION_MAX
-191 0x2000 //TX_A_POST_FLT_MICBLK
-192 0x0000 //TX_BLKENERTH
-193 0x0000 //TX_BLKENERHIGHTH
-194 0x0000 //TX_NORMENERTH
-195 0x0000 //TX_NORMENERHIGHTH
-196 0x0000 //TX_NORMENERHIGHTHL
-197 0x7800 //TX_DTD_THR1_0
-198 0x7000 //TX_DTD_THR1_1
-199 0x7FFF //TX_DTD_THR1_2
-200 0x7FFF //TX_DTD_THR1_3
-201 0x7FFF //TX_DTD_THR1_4
-202 0x7FFF //TX_DTD_THR1_5
-203 0x7FFF //TX_DTD_THR1_6
-204 0x7FFF //TX_DTD_THR2_0
-205 0x7FFF //TX_DTD_THR2_1
-206 0x7FFF //TX_DTD_THR2_2
-207 0x7FFF //TX_DTD_THR2_3
-208 0x7FFF //TX_DTD_THR2_4
-209 0x7FFF //TX_DTD_THR2_5
-210 0x7FFF //TX_DTD_THR2_6
-211 0x1000 //TX_DTD_THR3
-212 0x0000 //TX_SPK_CUT_K
-213 0x0BB8 //TX_DT_CUT_K
-214 0x0CCD //TX_DT_CUT_THR
-215 0x04EB //TX_COMFORT_G
-216 0x01F4 //TX_POWER_YOUT_TH
-217 0x4000 //TX_FDPFGAINECHO
-218 0x0000 //TX_DTD_HD_THR
-219 0x0000 //TX_SPK_CUT_K_S
-220 0x0000 //TX_DTD_MIC_BLK
-221 0x0400 //TX_ADPT_STRICT_L
-222 0x0200 //TX_ADPT_STRICT_H
-223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
-224 0x3A98 //TX_RATIO_DT_H_TH_LOW
-225 0x1770 //TX_RATIO_DT_L_TH_HIGH
-226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
-227 0x09C4 //TX_RATIO_DT_L0_TH
-228 0x0800 //TX_B_POST_FILT_ECHO_L
-229 0x7FFF //TX_B_POST_FILT_ECHO_H
-230 0x0200 //TX_MIN_G_CTRL_ECHO
-231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
-232 0x00F0 //TX_EPD_OFFSET_00
-233 0x00F0 //TX_EPD_OFFST_01
-234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
-235 0x3A98 //TX_RATIO_DT_H_TH_CUT
-236 0x7FFF //TX_MIN_EQ_RE_EST_13
-237 0x7FFF //TX_DTD_THR1_7
-238 0x7FFF //TX_DTD_THR2_7
-239 0x0800 //TX_DT_RESRV_7
-240 0x0800 //TX_DT_RESRV_8
-241 0x0000 //TX_DT_RESRV_9
-242 0xF400 //TX_THR_SN_EST_0
-243 0xF400 //TX_THR_SN_EST_1
-244 0xF600 //TX_THR_SN_EST_2
-245 0xF400 //TX_THR_SN_EST_3
-246 0xF400 //TX_THR_SN_EST_4
-247 0xF400 //TX_THR_SN_EST_5
-248 0xF400 //TX_THR_SN_EST_6
-249 0xF600 //TX_THR_SN_EST_7
-250 0x0000 //TX_DELTA_THR_SN_EST_0
-251 0x0200 //TX_DELTA_THR_SN_EST_1
-252 0x0200 //TX_DELTA_THR_SN_EST_2
-253 0x0200 //TX_DELTA_THR_SN_EST_3
-254 0x0200 //TX_DELTA_THR_SN_EST_4
-255 0x0200 //TX_DELTA_THR_SN_EST_5
-256 0x0000 //TX_DELTA_THR_SN_EST_6
-257 0x0200 //TX_DELTA_THR_SN_EST_7
-258 0x6000 //TX_LAMBDA_NN_EST_0
-259 0x4000 //TX_LAMBDA_NN_EST_1
-260 0x4000 //TX_LAMBDA_NN_EST_2
-261 0x4000 //TX_LAMBDA_NN_EST_3
-262 0x4000 //TX_LAMBDA_NN_EST_4
-263 0x4000 //TX_LAMBDA_NN_EST_5
-264 0x6000 //TX_LAMBDA_NN_EST_6
-265 0x4000 //TX_LAMBDA_NN_EST_7
-266 0x0400 //TX_N_SN_EST
-267 0x001E //TX_INBEAM_T
-268 0x0041 //TX_INBEAMHOLDT
-269 0x2000 //TX_G_STRICT
-270 0x2000 //TX_EQ_THR_BF
-271 0x799A //TX_LAMBDA_EQ_BF
-272 0x1000 //TX_NE_RTO_TH
-273 0x0400 //TX_NE_RTO_TH_L
-274 0x0800 //TX_MAINREFRTOH_TH_H
-275 0x0800 //TX_MAINREFRTOH_TH_L
-276 0x0800 //TX_MAINREFRTO_TH_H
-277 0x0800 //TX_MAINREFRTO_TH_L
-278 0x0200 //TX_MAINREFRTO_TH_EQ
-279 0x1000 //TX_B_POST_FLT_0
-280 0x1000 //TX_B_POST_FLT_1
-281 0x000B //TX_NS_LVL_CTRL_0
-282 0x0011 //TX_NS_LVL_CTRL_1
-283 0x000F //TX_NS_LVL_CTRL_2
-284 0x000F //TX_NS_LVL_CTRL_3
-285 0x000F //TX_NS_LVL_CTRL_4
-286 0x000F //TX_NS_LVL_CTRL_5
-287 0x000F //TX_NS_LVL_CTRL_6
-288 0x0011 //TX_NS_LVL_CTRL_7
-289 0x000C //TX_MIN_GAIN_S_0
-290 0x000F //TX_MIN_GAIN_S_1
-291 0x000C //TX_MIN_GAIN_S_2
-292 0x000C //TX_MIN_GAIN_S_3
-293 0x000C //TX_MIN_GAIN_S_4
-294 0x000C //TX_MIN_GAIN_S_5
-295 0x000C //TX_MIN_GAIN_S_6
-296 0x000F //TX_MIN_GAIN_S_7
-297 0x7FFF //TX_NMOS_SUP
-298 0x0000 //TX_NS_MAX_PRI_SNR_TH
-299 0x0000 //TX_NMOS_SUP_MENSA
-300 0x7FFF //TX_SNRI_SUP_0
-301 0x7FFF //TX_SNRI_SUP_1
-302 0x7FFF //TX_SNRI_SUP_2
-303 0x7FFF //TX_SNRI_SUP_3
-304 0x7FFF //TX_SNRI_SUP_4
-305 0x7FFF //TX_SNRI_SUP_5
-306 0x7FFF //TX_SNRI_SUP_6
-307 0x7FFF //TX_SNRI_SUP_7
-308 0x7FFF //TX_THR_LFNS
-309 0x000E //TX_G_LFNS
-310 0x09C4 //TX_GAIN0_NTH
-311 0x000A //TX_MUSIC_MORENS
-312 0x7FFF //TX_A_POST_FILT_0
-313 0x2000 //TX_A_POST_FILT_1
-314 0x2000 //TX_A_POST_FILT_S_0
-315 0x5000 //TX_A_POST_FILT_S_1
-316 0x5000 //TX_A_POST_FILT_S_2
-317 0x5000 //TX_A_POST_FILT_S_3
-318 0x5000 //TX_A_POST_FILT_S_4
-319 0x5000 //TX_A_POST_FILT_S_5
-320 0x4000 //TX_A_POST_FILT_S_6
-321 0x5000 //TX_A_POST_FILT_S_7
-322 0x1000 //TX_B_POST_FILT_0
-323 0x1000 //TX_B_POST_FILT_1
-324 0x1000 //TX_B_POST_FILT_2
-325 0x1000 //TX_B_POST_FILT_3
-326 0x1000 //TX_B_POST_FILT_4
-327 0x1000 //TX_B_POST_FILT_5
-328 0x1000 //TX_B_POST_FILT_6
-329 0x1000 //TX_B_POST_FILT_7
-330 0x7FFF //TX_B_LESSCUT_RTO_S_0
-331 0x7FFF //TX_B_LESSCUT_RTO_S_1
-332 0x7FFF //TX_B_LESSCUT_RTO_S_2
-333 0x7FFF //TX_B_LESSCUT_RTO_S_3
-334 0x7FFF //TX_B_LESSCUT_RTO_S_4
-335 0x7FFF //TX_B_LESSCUT_RTO_S_5
-336 0x7FFF //TX_B_LESSCUT_RTO_S_6
-337 0x7FFF //TX_B_LESSCUT_RTO_S_7
-338 0x7900 //TX_LAMBDA_PFILT
-339 0x7B00 //TX_LAMBDA_PFILT_S_0
-340 0x7B00 //TX_LAMBDA_PFILT_S_1
-341 0x7B00 //TX_LAMBDA_PFILT_S_2
-342 0x7B00 //TX_LAMBDA_PFILT_S_3
-343 0x7B00 //TX_LAMBDA_PFILT_S_4
-344 0x7B00 //TX_LAMBDA_PFILT_S_5
-345 0x7B00 //TX_LAMBDA_PFILT_S_6
-346 0x7B00 //TX_LAMBDA_PFILT_S_7
-347 0x0000 //TX_K_PEPPER
-348 0x0800 //TX_A_PEPPER
-349 0x1EAA //TX_K_PEPPER_HF
-350 0x0800 //TX_A_PEPPER_HF
-351 0x0001 //TX_HMNC_BST_FLG
-352 0x0200 //TX_HMNC_BST_THR
-353 0x0800 //TX_DT_BINVAD_TH_0
-354 0x0800 //TX_DT_BINVAD_TH_1
-355 0x0800 //TX_DT_BINVAD_TH_2
-356 0x0800 //TX_DT_BINVAD_TH_3
-357 0x1D4C //TX_DT_BINVAD_ENDF
-358 0x0000 //TX_C_POST_FLT_DT
-359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
-360 0x0100 //TX_DT_BOOST
-361 0x0000 //TX_BF_SGRAD_FLG
-362 0x0005 //TX_BF_DVG_TH
-363 0x001E //TX_SN_C_F
-364 0x0000 //TX_K_APT
-365 0x0001 //TX_NOISEDET
-366 0x0190 //TX_NDETCT
-367 0x0050 //TX_NOISE_TH_0
-368 0x7FFF //TX_NOISE_TH_0_2
-369 0x7FFF //TX_NOISE_TH_0_3
-370 0x07D0 //TX_NOISE_TH_1
-371 0x00C8 //TX_NOISE_TH_2
-372 0x3A98 //TX_NOISE_TH_3
-373 0x0FA0 //TX_NOISE_TH_4
-374 0x157C //TX_NOISE_TH_5
-375 0x7FFF //TX_NOISE_TH_5_2
-376 0x7FFF //TX_NOISE_TH_5_3
-377 0x7FFF //TX_NOISE_TH_5_4
-378 0x044C //TX_NOISE_TH_6
-379 0x0014 //TX_MINENOISE_TH
-380 0x4000 //TX_MORENS_TFMASK_TH
-381 0xFFEE //TX_DRC_QUIET_FLOOR
-382 0x6000 //TX_RATIODTL_CUT_TH
-383 0xFFF3 //TX_DT_CUT_K1
-384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
-385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
-386 0x0333 //TX_OUT_ENER_S_TH_NOISY
-387 0x019A //TX_OUT_ENER_TH_NOISE
-388 0x0333 //TX_OUT_ENER_TH_SPEECH
-389 0x2000 //TX_SN_NPB_GAIN
-390 0x0000 //TX_NN_NPB_GAIN
-391 0x0000 //TX_POST_MASK_SUP_HSNE
-392 0x0000 //TX_TAIL_DET_TH
-393 0x0000 //TX_B_LESSCUT_RTO_WTA
-394 0x0000 //TX_MEL_G_R
-395 0x0800 //TX_SUPHIGH_TH
-396 0x00C8 //TX_MASK_G_R
-397 0x0002 //TX_EXTRA_NS_L
-398 0x0800 //TX_C_POST_FLT_MASK
-399 0x0005 //TX_A_POST_FLT_WNS
-400 0x0148 //TX_MIN_G_LOW300HZ
-401 0x0002 //TX_MAXLEVEL_CNG
-402 0x00B4 //TX_STN_NOISE_TH
-403 0x4000 //TX_POST_MASK_SUP
-404 0x7FFF //TX_POST_MASK_ADJUST
-405 0x00C8 //TX_NS_ENOISE_MIC0_TH
-406 0x0014 //TX_MINENOISE_MIC0_TH
-407 0x012C //TX_MINENOISE_MIC0_S_TH
-408 0x2900 //TX_MIN_G_CTRL_SSNS
-409 0x0800 //TX_METAL_RTO_THR
-410 0x4848 //TX_NS_FP_K_METAL
-411 0x3A98 //TX_NOISEDET_BOOST_TH
-412 0x0FA0 //TX_NSMOOTH_TH
-413 0x0000 //TX_NS_RESRV_8
-414 0x1800 //TX_RHO_UPB
-415 0x0BB8 //TX_N_HOLD_HS
-416 0x0050 //TX_N_RHO_BFR0
-417 0x7FFF //TX_LAMBDA_ARSP_EST
-418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
-419 0x0CCD //TX_THR_STD_NSR
-420 0x019A //TX_THR_STD_PLH
-421 0x2AF8 //TX_N_HOLD_STD
-422 0x0066 //TX_THR_STD_RHO
-423 0x2000 //TX_BF_RESET_THR_HS
-424 0x09C4 //TX_SB_RTO_MEAN_TH
-425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
-426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
-427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
-428 0x0000 //TX_WTA_EN_RTO_TH
-429 0x0000 //TX_TOP_ENER_TH_F
-430 0x0000 //TX_DESIRED_TALK_HOLDT
-431 0x0800 //TX_MIC_BLOCK_FACTOR
-432 0x0000 //TX_NSEST_BFRLRNRDC
-433 0x0000 //TX_THR_POST_FLT_HS
-434 0x0010 //TX_HS_VAD_BIN
-435 0x2666 //TX_THR_VAD_HS
-436 0x2CCD //TX_MEAN_RTO_MIN_TH2
-437 0x0032 //TX_SILENCE_T
-438 0x0000 //TX_A_POST_FLT_WTA
-439 0x799A //TX_LAMBDA_PFLT_WTA
-440 0x0000 //TX_SB_RHO_MEAN2_TH
-441 0x0190 //TX_SB_RHO_MEAN3_TH
-442 0x0000 //TX_HS_RESRV_4
-443 0x0000 //TX_HS_RESRV_5
-444 0x003C //TX_DOA_VAD_THR_1
-445 0x0000 //TX_DOA_VAD_THR_2
-446 0x0028 //TX_DOA_VAD_THR1_0
-447 0x0028 //TX_DOA_VAD_THR1_1
-448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
-449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
-450 0x005A //TX_DFLT_SRC_DOA_0A
-451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
-452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
-453 0x0000 //TX_DFLT_SRC_DOA_0B
-454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
-455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
-456 0x0000 //TX_DFLT_SRC_DOA_0C
-457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
-458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
-459 0x0000 //TX_DFLT_SRC_DOA_0D
-460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
-461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
-462 0x005A //TX_DFLT_SRC_DOA_1A
-463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
-464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
-465 0x005A //TX_DFLT_SRC_DOA_1B
-466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
-467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
-468 0x005A //TX_DFLT_SRC_DOA_1C
-469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
-470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
-471 0x005A //TX_DFLT_SRC_DOA_1D
-472 0x0100 //TX_BF_HOLDOFF_T
-473 0x7FFF //TX_DOA_COST_FACTOR
-474 0x4000 //TX_MAINTOREFR_TH0
-475 0x071C //TX_DOA_TRK_THR
-476 0x012C //TX_DOA_TRACK_HT
-477 0x0200 //TX_N1_HOLD_HF
-478 0x0100 //TX_N2_HOLD_HF
-479 0x3000 //TX_BF_RESET_THR_HF
-480 0x7333 //TX_DOA_SMOOTH
-481 0x0800 //TX_MU_BF
-482 0x0800 //TX_BF_MU_LF_B2
-483 0x0040 //TX_BF_FC_END_BIN_B2
-484 0x0020 //TX_BF_FC_END_BIN
-485 0x0000 //TX_HF_RESRV_25
-486 0x0000 //TX_HF_RESRV_26
-487 0x0007 //TX_N_DOA_SEED
-488 0x0001 //TX_FINE_DOA_SEARCH_FLG
-489 0x0000 //TX_HF_RESRV_27
-490 0x038E //TX_DLT_SRC_DOA_RNG
-491 0x0200 //TX_BF_MU_LF
-492 0x0000 //TX_DFLT_SRC_LOC_0
-493 0x7FFF //TX_DFLT_SRC_LOC_1
-494 0x0000 //TX_DFLT_SRC_LOC_2
-495 0x038E //TX_DOA_TRACK_VADTH
-496 0x0000 //TX_DOA_TRACK_NEW
-497 0x01E0 //TX_NOR_OFF_THR
-498 0x7C00 //TX_MORE_ON_700HZ_THR
-499 0x2000 //TX_MU_BF_ADPT_NS
-500 0x0000 //TX_ADAPT_LEN
-501 0x6666 //TX_MORE_SNS
-502 0x0000 //TX_NOR_OFF_TH1
-503 0x0000 //TX_WIDE_MASK_TH
-504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505 0x6000 //TX_C_POST_FLT_CUT
-506 0x2000 //TX_RADIODTLV
-507 0x0320 //TX_POWER_LINEIN_TH
-508 0x0014 //TX_FE_VADCOUNT_TH_FC
-509 0x0000 //TX_ECHO_SUPP_FC
-510 0x0C80 //TX_ECHO_TH
-511 0x6666 //TX_MIC_TO_BFGAIN
-512 0x0000 //TX_MICTOBFGAIN0
-513 0x0000 //TX_FASTMUE_TH
-514 0x0000 //TX_DEREVERB_LF_MU
-515 0x0000 //TX_DEREVERB_HF_MU
-516 0x0000 //TX_DEREVERB_DELAY
-517 0x0000 //TX_DEREVERB_COEF_LEN
-518 0x0000 //TX_DEREVERB_DNR
-519 0x0000 //TX_DEREVERB_ALPHA
-520 0x0000 //TX_DEREVERB_BETA
-521 0x0000 //TX_GSC_RTOL_TH
-522 0x0000 //TX_GSC_RTOH_TH
-523 0x0000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
-526 0x122E //TX_DR_RESRV_7
-527 0x1100 //TX_DR_RESRV_8
-528 0x1333 //TX_WIND_MARK_TH
-529 0x399A //TX_CORR_THR
-530 0x0004 //TX_SNR_THR
-531 0x0010 //TX_ENGY_THR
-532 0x1770 //TX_CORR_HIGH_TH
-533 0x6000 //TX_ENGY_THR_2
-534 0x3400 //TX_MEAN_RTO_THR
-535 0x0028 //TX_WNS_ENOISE_MIC0_TH
-536 0x3000 //TX_RATIOMICL_TH
-537 0x64CD //TX_CALIG_HS
-538 0x0000 //TX_LVL_CTRL
-539 0x0014 //TX_WIND_SUPRTO
-540 0x000A //TX_WNS_MIN_G
-541 0x0000 //TX_WNS_B_POST_FLT
-542 0x2800 //TX_RATIOMICH_TH
-543 0xD120 //TX_WIND_INBEAM_L_TH
-544 0x0FA0 //TX_WIND_INBEAM_H_TH
-545 0x2000 //TX_WNS_RESRV_0
-546 0x59D8 //TX_WNS_RESRV_1
-547 0x0000 //TX_WNS_RESRV_2
-548 0x0000 //TX_WNS_RESRV_3
-549 0x0000 //TX_WNS_RESRV_4
-550 0x0000 //TX_WNS_RESRV_5
-551 0x0000 //TX_WNS_RESRV_6
-552 0x0000 //TX_BVE_NOISE_FLOOR_0
-553 0x0070 //TX_BVE_NOISE_FLOOR_1
-554 0x0070 //TX_BVE_NOISE_FLOOR_2
-555 0x0010 //TX_BVE_NOISE_FLOOR_3
-556 0x0070 //TX_BVE_NOISE_FLOOR_4
-557 0x00B0 //TX_BVE_NOISE_FLOOR_5
-558 0x0E66 //TX_BVE_NOISE_FLOOR_6
-559 0x0050 //TX_BVE_NOISE_FLOOR_7
-560 0x770A //TX_BVE_NOISE_FLOOR_8
-561 0x0000 //TX_BVE_NOISE_FLOOR_9
-562 0x0000 //TX_BVE_IN_N
-563 0x0000 //TX_BVE_OUT_N
-564 0x0000 //TX_BVE_MICALPHA_DOWN
-565 0x0000 //TX_PB_RESRV_1
-566 0x0020 //TX_FDEQ_SUBNUM
-567 0x4848 //TX_FDEQ_GAIN_0
-568 0x4848 //TX_FDEQ_GAIN_1
-569 0x4848 //TX_FDEQ_GAIN_2
-570 0x4848 //TX_FDEQ_GAIN_3
-571 0x4848 //TX_FDEQ_GAIN_4
-572 0x4848 //TX_FDEQ_GAIN_5
-573 0x4848 //TX_FDEQ_GAIN_6
-574 0x4848 //TX_FDEQ_GAIN_7
-575 0x4848 //TX_FDEQ_GAIN_8
-576 0x4848 //TX_FDEQ_GAIN_9
-577 0x4848 //TX_FDEQ_GAIN_10
-578 0x4848 //TX_FDEQ_GAIN_11
-579 0x4848 //TX_FDEQ_GAIN_12
-580 0x4848 //TX_FDEQ_GAIN_13
-581 0x4848 //TX_FDEQ_GAIN_14
-582 0x4848 //TX_FDEQ_GAIN_15
-583 0x4848 //TX_FDEQ_GAIN_16
-584 0x4848 //TX_FDEQ_GAIN_17
-585 0x4848 //TX_FDEQ_GAIN_18
-586 0x4848 //TX_FDEQ_GAIN_19
-587 0x4848 //TX_FDEQ_GAIN_20
-588 0x4848 //TX_FDEQ_GAIN_21
-589 0x4848 //TX_FDEQ_GAIN_22
-590 0x4848 //TX_FDEQ_GAIN_23
-591 0x0202 //TX_FDEQ_BIN_0
-592 0x0203 //TX_FDEQ_BIN_1
-593 0x0303 //TX_FDEQ_BIN_2
-594 0x0304 //TX_FDEQ_BIN_3
-595 0x0405 //TX_FDEQ_BIN_4
-596 0x0506 //TX_FDEQ_BIN_5
-597 0x0708 //TX_FDEQ_BIN_6
-598 0x090A //TX_FDEQ_BIN_7
-599 0x0B0C //TX_FDEQ_BIN_8
-600 0x0D0E //TX_FDEQ_BIN_9
-601 0x1013 //TX_FDEQ_BIN_10
-602 0x1719 //TX_FDEQ_BIN_11
-603 0x1B1E //TX_FDEQ_BIN_12
-604 0x1E1E //TX_FDEQ_BIN_13
-605 0x1E28 //TX_FDEQ_BIN_14
-606 0x282C //TX_FDEQ_BIN_15
-607 0x0000 //TX_FDEQ_BIN_16
-608 0x0000 //TX_FDEQ_BIN_17
-609 0x0000 //TX_FDEQ_BIN_18
-610 0x0000 //TX_FDEQ_BIN_19
-611 0x0000 //TX_FDEQ_BIN_20
-612 0x0000 //TX_FDEQ_BIN_21
-613 0x0000 //TX_FDEQ_BIN_22
-614 0x0000 //TX_FDEQ_BIN_23
-615 0x0000 //TX_FDEQ_PADDING
-616 0x0020 //TX_PREEQ_SUBNUM_MIC0
-617 0x4848 //TX_PREEQ_GAIN_MIC0_0
-618 0x4848 //TX_PREEQ_GAIN_MIC0_1
-619 0x4848 //TX_PREEQ_GAIN_MIC0_2
-620 0x4848 //TX_PREEQ_GAIN_MIC0_3
-621 0x4848 //TX_PREEQ_GAIN_MIC0_4
-622 0x4848 //TX_PREEQ_GAIN_MIC0_5
-623 0x4848 //TX_PREEQ_GAIN_MIC0_6
-624 0x4848 //TX_PREEQ_GAIN_MIC0_7
-625 0x4868 //TX_PREEQ_GAIN_MIC0_8
-626 0x6860 //TX_PREEQ_GAIN_MIC0_9
-627 0x6048 //TX_PREEQ_GAIN_MIC0_10
-628 0x4848 //TX_PREEQ_GAIN_MIC0_11
-629 0x4848 //TX_PREEQ_GAIN_MIC0_12
-630 0x4848 //TX_PREEQ_GAIN_MIC0_13
-631 0x4848 //TX_PREEQ_GAIN_MIC0_14
-632 0x4848 //TX_PREEQ_GAIN_MIC0_15
-633 0x4848 //TX_PREEQ_GAIN_MIC0_16
-634 0x4848 //TX_PREEQ_GAIN_MIC0_17
-635 0x4848 //TX_PREEQ_GAIN_MIC0_18
-636 0x4848 //TX_PREEQ_GAIN_MIC0_19
-637 0x4848 //TX_PREEQ_GAIN_MIC0_20
-638 0x4848 //TX_PREEQ_GAIN_MIC0_21
-639 0x4848 //TX_PREEQ_GAIN_MIC0_22
-640 0x4848 //TX_PREEQ_GAIN_MIC0_23
-641 0x0E10 //TX_PREEQ_BIN_MIC0_0
-642 0x1010 //TX_PREEQ_BIN_MIC0_1
-643 0x1010 //TX_PREEQ_BIN_MIC0_2
-644 0x1010 //TX_PREEQ_BIN_MIC0_3
-645 0x1010 //TX_PREEQ_BIN_MIC0_4
-646 0x1010 //TX_PREEQ_BIN_MIC0_5
-647 0x1010 //TX_PREEQ_BIN_MIC0_6
-648 0x1010 //TX_PREEQ_BIN_MIC0_7
-649 0x1010 //TX_PREEQ_BIN_MIC0_8
-650 0x1010 //TX_PREEQ_BIN_MIC0_9
-651 0x1010 //TX_PREEQ_BIN_MIC0_10
-652 0x1010 //TX_PREEQ_BIN_MIC0_11
-653 0x1010 //TX_PREEQ_BIN_MIC0_12
-654 0x1010 //TX_PREEQ_BIN_MIC0_13
-655 0x1010 //TX_PREEQ_BIN_MIC0_14
-656 0x0200 //TX_PREEQ_BIN_MIC0_15
-657 0x0000 //TX_PREEQ_BIN_MIC0_16
-658 0x0000 //TX_PREEQ_BIN_MIC0_17
-659 0x0000 //TX_PREEQ_BIN_MIC0_18
-660 0x0000 //TX_PREEQ_BIN_MIC0_19
-661 0x0000 //TX_PREEQ_BIN_MIC0_20
-662 0x0000 //TX_PREEQ_BIN_MIC0_21
-663 0x0000 //TX_PREEQ_BIN_MIC0_22
-664 0x0000 //TX_PREEQ_BIN_MIC0_23
-665 0x0020 //TX_PREEQ_SUBNUM_MIC1
-666 0x4848 //TX_PREEQ_GAIN_MIC1_0
-667 0x4848 //TX_PREEQ_GAIN_MIC1_1
-668 0x4848 //TX_PREEQ_GAIN_MIC1_2
-669 0x4848 //TX_PREEQ_GAIN_MIC1_3
-670 0x4848 //TX_PREEQ_GAIN_MIC1_4
-671 0x4848 //TX_PREEQ_GAIN_MIC1_5
-672 0x4848 //TX_PREEQ_GAIN_MIC1_6
-673 0x4848 //TX_PREEQ_GAIN_MIC1_7
-674 0x4848 //TX_PREEQ_GAIN_MIC1_8
-675 0x4848 //TX_PREEQ_GAIN_MIC1_9
-676 0x4848 //TX_PREEQ_GAIN_MIC1_10
-677 0x4848 //TX_PREEQ_GAIN_MIC1_11
-678 0x4848 //TX_PREEQ_GAIN_MIC1_12
-679 0x4848 //TX_PREEQ_GAIN_MIC1_13
-680 0x4848 //TX_PREEQ_GAIN_MIC1_14
-681 0x4848 //TX_PREEQ_GAIN_MIC1_15
-682 0x4848 //TX_PREEQ_GAIN_MIC1_16
-683 0x4848 //TX_PREEQ_GAIN_MIC1_17
-684 0x4848 //TX_PREEQ_GAIN_MIC1_18
-685 0x4848 //TX_PREEQ_GAIN_MIC1_19
-686 0x4848 //TX_PREEQ_GAIN_MIC1_20
-687 0x4848 //TX_PREEQ_GAIN_MIC1_21
-688 0x4848 //TX_PREEQ_GAIN_MIC1_22
-689 0x4848 //TX_PREEQ_GAIN_MIC1_23
-690 0x0E10 //TX_PREEQ_BIN_MIC1_0
-691 0x1010 //TX_PREEQ_BIN_MIC1_1
-692 0x1010 //TX_PREEQ_BIN_MIC1_2
-693 0x1010 //TX_PREEQ_BIN_MIC1_3
-694 0x1010 //TX_PREEQ_BIN_MIC1_4
-695 0x1010 //TX_PREEQ_BIN_MIC1_5
-696 0x1010 //TX_PREEQ_BIN_MIC1_6
-697 0x1010 //TX_PREEQ_BIN_MIC1_7
-698 0x1010 //TX_PREEQ_BIN_MIC1_8
-699 0x1010 //TX_PREEQ_BIN_MIC1_9
-700 0x1010 //TX_PREEQ_BIN_MIC1_10
-701 0x1010 //TX_PREEQ_BIN_MIC1_11
-702 0x1010 //TX_PREEQ_BIN_MIC1_12
-703 0x1010 //TX_PREEQ_BIN_MIC1_13
-704 0x1010 //TX_PREEQ_BIN_MIC1_14
-705 0x0200 //TX_PREEQ_BIN_MIC1_15
-706 0x0000 //TX_PREEQ_BIN_MIC1_16
-707 0x0000 //TX_PREEQ_BIN_MIC1_17
-708 0x0000 //TX_PREEQ_BIN_MIC1_18
-709 0x0000 //TX_PREEQ_BIN_MIC1_19
-710 0x0000 //TX_PREEQ_BIN_MIC1_20
-711 0x0000 //TX_PREEQ_BIN_MIC1_21
-712 0x0000 //TX_PREEQ_BIN_MIC1_22
-713 0x0000 //TX_PREEQ_BIN_MIC1_23
-714 0x0020 //TX_PREEQ_SUBNUM_MIC2
-715 0x4848 //TX_PREEQ_GAIN_MIC2_0
-716 0x4848 //TX_PREEQ_GAIN_MIC2_1
-717 0x4848 //TX_PREEQ_GAIN_MIC2_2
-718 0x4848 //TX_PREEQ_GAIN_MIC2_3
-719 0x4848 //TX_PREEQ_GAIN_MIC2_4
-720 0x4848 //TX_PREEQ_GAIN_MIC2_5
-721 0x4848 //TX_PREEQ_GAIN_MIC2_6
-722 0x4848 //TX_PREEQ_GAIN_MIC2_7
-723 0x4848 //TX_PREEQ_GAIN_MIC2_8
-724 0x4848 //TX_PREEQ_GAIN_MIC2_9
-725 0x4848 //TX_PREEQ_GAIN_MIC2_10
-726 0x4848 //TX_PREEQ_GAIN_MIC2_11
-727 0x4848 //TX_PREEQ_GAIN_MIC2_12
-728 0x4848 //TX_PREEQ_GAIN_MIC2_13
-729 0x4848 //TX_PREEQ_GAIN_MIC2_14
-730 0x4848 //TX_PREEQ_GAIN_MIC2_15
-731 0x4848 //TX_PREEQ_GAIN_MIC2_16
-732 0x4848 //TX_PREEQ_GAIN_MIC2_17
-733 0x4848 //TX_PREEQ_GAIN_MIC2_18
-734 0x4848 //TX_PREEQ_GAIN_MIC2_19
-735 0x4848 //TX_PREEQ_GAIN_MIC2_20
-736 0x4848 //TX_PREEQ_GAIN_MIC2_21
-737 0x4848 //TX_PREEQ_GAIN_MIC2_22
-738 0x4848 //TX_PREEQ_GAIN_MIC2_23
-739 0x0E10 //TX_PREEQ_BIN_MIC2_0
-740 0x1010 //TX_PREEQ_BIN_MIC2_1
-741 0x1010 //TX_PREEQ_BIN_MIC2_2
-742 0x1010 //TX_PREEQ_BIN_MIC2_3
-743 0x1010 //TX_PREEQ_BIN_MIC2_4
-744 0x1010 //TX_PREEQ_BIN_MIC2_5
-745 0x1010 //TX_PREEQ_BIN_MIC2_6
-746 0x1010 //TX_PREEQ_BIN_MIC2_7
-747 0x1010 //TX_PREEQ_BIN_MIC2_8
-748 0x1010 //TX_PREEQ_BIN_MIC2_9
-749 0x1010 //TX_PREEQ_BIN_MIC2_10
-750 0x1010 //TX_PREEQ_BIN_MIC2_11
-751 0x1010 //TX_PREEQ_BIN_MIC2_12
-752 0x1010 //TX_PREEQ_BIN_MIC2_13
-753 0x1010 //TX_PREEQ_BIN_MIC2_14
-754 0x0200 //TX_PREEQ_BIN_MIC2_15
-755 0x0000 //TX_PREEQ_BIN_MIC2_16
-756 0x0000 //TX_PREEQ_BIN_MIC2_17
-757 0x0000 //TX_PREEQ_BIN_MIC2_18
-758 0x0000 //TX_PREEQ_BIN_MIC2_19
-759 0x0000 //TX_PREEQ_BIN_MIC2_20
-760 0x0000 //TX_PREEQ_BIN_MIC2_21
-761 0x0000 //TX_PREEQ_BIN_MIC2_22
-762 0x0000 //TX_PREEQ_BIN_MIC2_23
-763 0x0006 //TX_MASKING_ABILITY
-764 0x0800 //TX_NND_WEIGHT
-765 0x0062 //TX_MIC_CALIBRATION_0
-766 0x0062 //TX_MIC_CALIBRATION_1
-767 0x0062 //TX_MIC_CALIBRATION_2
-768 0x0062 //TX_MIC_CALIBRATION_3
-769 0x0046 //TX_MIC_PWR_BIAS_0
-770 0x0046 //TX_MIC_PWR_BIAS_1
-771 0x0046 //TX_MIC_PWR_BIAS_2
-772 0x0046 //TX_MIC_PWR_BIAS_3
-773 0x000C //TX_GAIN_LIMIT_0
-774 0x000C //TX_GAIN_LIMIT_1
-775 0x000C //TX_GAIN_LIMIT_2
-776 0x000C //TX_GAIN_LIMIT_3
-777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
-778 0x7FDE //TX_BVE_VAD0_ALPHAUP
-779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
-780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
-781 0x7F5B //TX_BVE_FEVADLI_ALPHA
-782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
-783 0x3000 //TX_TDDRC_ALPHA_UP_01
-784 0x3000 //TX_TDDRC_ALPHA_UP_02
-785 0x3000 //TX_TDDRC_ALPHA_UP_03
-786 0x3000 //TX_TDDRC_ALPHA_UP_04
-787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
-788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
-789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
-790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
-791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
-792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
-793 0x0000 //TX_TDDRC_RESRV_0
-794 0x0000 //TX_TDDRC_RESRV_1
-795 0x0018 //TX_FDDRC_BAND_MARGIN_0
-796 0x0030 //TX_FDDRC_BAND_MARGIN_1
-797 0x0050 //TX_FDDRC_BAND_MARGIN_2
-798 0x0080 //TX_FDDRC_BAND_MARGIN_3
-799 0x0007 //TX_FDDRC_BLOCK_EXP
-800 0x5000 //TX_FDDRC_THRD_2_0
-801 0x5000 //TX_FDDRC_THRD_2_1
-802 0x5000 //TX_FDDRC_THRD_2_2
-803 0x5000 //TX_FDDRC_THRD_2_3
-804 0x6400 //TX_FDDRC_THRD_3_0
-805 0x6400 //TX_FDDRC_THRD_3_1
-806 0x6400 //TX_FDDRC_THRD_3_2
-807 0x6400 //TX_FDDRC_THRD_3_3
-808 0x2000 //TX_FDDRC_SLANT_0_0
-809 0x2000 //TX_FDDRC_SLANT_0_1
-810 0x2000 //TX_FDDRC_SLANT_0_2
-811 0x2000 //TX_FDDRC_SLANT_0_3
-812 0x5333 //TX_FDDRC_SLANT_1_0
-813 0x5333 //TX_FDDRC_SLANT_1_1
-814 0x5333 //TX_FDDRC_SLANT_1_2
-815 0x5333 //TX_FDDRC_SLANT_1_3
-816 0x0000 //TX_DEADMIC_SILENCE_TH
-817 0x0000 //TX_MIC_DEGRADE_TH
-818 0x0000 //TX_DEADMIC_CNT
-819 0x0000 //TX_MIC_DEGRADE_CNT
-820 0x0000 //TX_FDDRC_RESRV_4
-821 0x0000 //TX_FDDRC_RESRV_5
-822 0x0000 //TX_FDDRC_RESRV_6
-823 0x7FFF //TX_NOISE_FLOOR_TH
-824 0x0001 //TX_NOISE_TH_BGN_LEVEL_1
-825 0x7FFF //TX_NOISE_TH_BGN_LEVEL_2
-826 0x0000 //TX_NOISE_TH_BGN_LEVEL_3
-827 0x0000 //TX_NOISE_IN_N
-828 0x0000 //TX_NOISE_OUT_N
-829 0x7C00 //TX_LAMBDA_PKA_FP
-830 0x2000 //TX_TPKA_FP
-831 0x0080 //TX_MIN_G_FP
-832 0x2000 //TX_MAX_G_FP
-833 0x4848 //TX_FFP_FP_K_METAL
-834 0x4000 //TX_A_POST_FLT_FP
-835 0x0F5C //TX_RTO_OUTBEAM_TH
-836 0x4CCD //TX_TPKA_FP_THD
-837 0x0000 //TX_MAX_G_FP_BLK
-838 0x0000 //TX_FFP_FADEIN
-839 0x0000 //TX_FFP_FADEOUT
-840 0x0000 //TX_WHISPERCTH
-841 0x0000 //TX_WHISPERHOLDT
-842 0x0000 //TX_WHISP_ENTHH
-843 0x0000 //TX_WHISP_ENTHL
-844 0x0000 //TX_WHISP_RTOTH
-845 0x0000 //TX_WHISP_RTOTH2
-846 0x0000 //TX_MUTE_PERIOD
-847 0x0000 //TX_FADE_IN_PERIOD
-848 0x0100 //TX_FFP_RESRV_2
-849 0x0020 //TX_FFP_RESRV_3
-850 0x0000 //TX_FFP_RESRV_4
-851 0x0000 //TX_FFP_RESRV_5
-852 0x0000 //TX_FFP_RESRV_6
-853 0x0000 //TX_FILTINDX
-854 0x0000 //TX_TDDRC_THRD_0
-855 0x0000 //TX_TDDRC_THRD_1
-856 0x2000 //TX_TDDRC_THRD_2
-857 0x2000 //TX_TDDRC_THRD_3
-858 0x3000 //TX_TDDRC_SLANT_0
-859 0x6E00 //TX_TDDRC_SLANT_1
-860 0x3000 //TX_TDDRC_ALPHA_UP_00
-861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
-862 0x0000 //TX_TDDRC_HMNC_FLAG
-863 0x199A //TX_TDDRC_HMNC_GAIN
-864 0x0000 //TX_TDDRC_SMT_FLAG
-865 0x0CCD //TX_TDDRC_SMT_W
-866 0x0970 //TX_TDDRC_DRC_GAIN
-867 0x78D6 //TX_TDDRC_LMT_THRD
-868 0x0000 //TX_TDDRC_LMT_ALPHA
-869 0x0000 //TX_TFMASKLTH
-870 0x0000 //TX_TFMASKLTHL
-871 0x0CCD //TX_TFMASKHTH
-872 0x0CCD //TX_TFMASKLTH_BINVAD
-873 0xF333 //TX_TFMASKLTH_NS_EST
-874 0x2CCD //TX_TFMASKLTH_DOA
-875 0xECCD //TX_TFMASKTH_BLESSCUT
-876 0x1000 //TX_B_LESSCUT_RTO_MASK
-877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
-878 0x2000 //TX_B_POST_FLT_MASK
-879 0x0000 //TX_B_POST_FLT_MASK1
-880 0x5333 //TX_GAIN_WIND_MASK
-881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
-882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
-883 0x7333 //TX_FASTNS_OUTIN_TH
-884 0x0CCD //TX_FASTNS_TFMASK_TH
-885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
-886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
-887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
-888 0x0028 //TX_FASTNS_ARSPC_TH
-889 0xC000 //TX_FASTNS_MASK5_TH
-890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
-891 0x1000 //TX_A_LESSCUT_RTO_MASK
-892 0x1770 //TX_FASTNS_NOISETH
-893 0xC000 //TX_FASTNS_SSA_THLFL
-894 0xC000 //TX_FASTNS_SSA_THHFL
-895 0xCCCC //TX_FASTNS_SSA_THLFH
-896 0xD999 //TX_FASTNS_SSA_THHFH
-897 0x0000 //TX_SENDFUNC_REG_MICMUTE
-898 0x0000 //TX_SENDFUNC_REG_MICMUTE1
-899 0x0000 //TX_MICMUTE_RATIO_THR
-900 0x0000 //TX_MICMUTE_AMP_THR
-901 0x0000 //TX_MICMUTE_HPF_IND
-902 0x0000 //TX_MICMUTE_LOG_EYR_TH
-903 0x0000 //TX_MICMUTE_CVG_TIME
-904 0x0000 //TX_MICMUTE_RELEASE_TIME
-905 0x0000 //TX_MIC_VOLUME_MIC0MUTE
-906 0x0000 //TX_MICMUTE_EPD_OFFSET_0
-907 0x0000 //TX_MICMUTE_FRQ_AEC_L
-908 0x0000 //TX_MICMUTE_EAD_THR
-909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE
-910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST
-911 0x0000 //TX_DTD_THR1_MICMUTE_0
-912 0x0000 //TX_DTD_THR1_MICMUTE_1
-913 0x0000 //TX_DTD_THR1_MICMUTE_2
-914 0x0000 //TX_DTD_THR1_MICMUTE_3
-915 0x0000 //TX_DTD_THR2_MICMUTE_0
-916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0
-917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1
-918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2
-919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3
-920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4
-921 0x0000 //TX_MICMUTE_C_POST_FLT
-922 0x0000 //TX_MICMUTE_DT_CUT_K
-923 0x0000 //TX_MICMUTE_DT_CUT_THR
-924 0x0000 //TX_MICMUTE_DT_CUT_K2
-925 0x0000 //TX_MICMUTE_DT_CUT_THR2
-926 0x0000 //TX_MICMUTE_DT2_HOLD_N
-927 0x0000 //TX_MICMUTE_RATIODTH_THCUT
-928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL
-929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH
-930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK
-931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH
-932 0x0000 //TX_MICMUTE_DT_CUT_K1
-933 0x0000 //TX_MICMUTE_N2_SN_EST
-934 0x0000 //TX_MICMUTE_THR_SN_EST_0
-935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0
-936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0
-937 0x0000 //TX_MICMUTE_B_POST_FILT_0
-938 0x0000 //TX_MIC1RUB_AMP_THR
-939 0x0000 //TX_MIC1MUTE_RATIO_THR
-940 0x0000 //TX_MIC1MUTE_AMP_THR
-941 0x0000 //TX_MIC1MUTE_CVG_TIME
-942 0x0000 //TX_MIC1MUTE_RELEASE_TIME
-943 0x0000 //TX_MIC_VOLUME_MIC1MUTE
-944 0x0000 //TX_TFMASKM4_2_DT_THR
-945 0x0000 //TX_MEAN_GAIN500HZ_DT_THR
-946 0x0000 //TX_AMS_RESRV_04
-947 0x0000 //TX_AMS_RESRV_05
-948 0x0000 //TX_AMS_RESRV_06
-949 0x0000 //TX_AMS_RESRV_07
-950 0x0000 //TX_AMS_RESRV_08
-951 0x0000 //TX_AMS_RESRV_09
-952 0x0000 //TX_AMS_RESRV_10
-953 0x0000 //TX_AMS_RESRV_11
-954 0x0000 //TX_AMS_RESRV_12
-955 0x0000 //TX_AMS_RESRV_13
-956 0x0000 //TX_AMS_RESRV_14
-957 0x0000 //TX_AMS_RESRV_15
-958 0x0000 //TX_AMS_RESRV_16
-959 0x0000 //TX_AMS_RESRV_17
-960 0x0000 //TX_AMS_RESRV_18
-961 0x0000 //TX_AMS_RESRV_19
-962 0x0100 //TX_EASSA_AEC_NSSA_REFG_0
-963 0x0200 //TX_EASSA_AEC_NSSA_REFG_1
-964 0x0200 //TX_EASSA_AEC_NSSA_REFG_2
-965 0x0200 //TX_EASSA_AEC_NSSA_REFG_3
-966 0x0200 //TX_EASSA_AEC_NSSA_REFG_4
-967 0x0C00 //TX_EASSA_AEC_NSSA_REFG_5
-968 0x0000 //TX_EASSA_AEC_NSSA_GAIN
-969 0x2710 //TX_EASSA_BIG_NONLINEAR_TH
-970 0x0000 //TX_EASSA_AEC_REFG_STNONL_0
-971 0x0200 //TX_EASSA_AEC_REFG_STNONL_1
-972 0x0400 //TX_EASSA_AEC_REFG_STNONL_2
-973 0x0400 //TX_EASSA_AEC_REFG_STNONL_3
-974 0x0400 //TX_EASSA_AEC_REFG_STNONL_4
-975 0x0C00 //TX_EASSA_AEC_REFG_STNONL_5
-976 0x00A0 //TX_EASSA_AEC_FEMALE_ECHO_TH
-977 0x0032 //TX_EASSA_NONLECHO_TH
-978 0x4E20 //TX_EASSA_NONLECHO_ECHOENTH
-979 0x0000 //TX_EASSA_NNG
-980 0x0800 //TX_EASSA_NONLHFG
-981 0x1000 //TX_EASSA_DT2000HZ_REFG
-982 0x0C00 //TX_EASSA_DT400HZ_MAING
-983 0x3A98 //TX_EASSA_RATIODTH_THCUT_NSSA
-984 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
-985 0x0000 //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
-986 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
-987 0x0000 //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
-#RX
-0 0x8064 //RX_RECVFUNC_MODE_0
-1 0x0000 //RX_RECVFUNC_MODE_1
-2 0x0003 //RX_SAMPLINGFREQ_SIG
-3 0x0003 //RX_SAMPLINGFREQ_PROC
-4 0x000A //RX_FRAME_SZ
-5 0x0000 //RX_DELAY_OPT
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-10 0x0800 //RX_PGA
-11 0x7FFF //RX_A_HP
-12 0x0000 //RX_B_PE
-13 0x1800 //RX_THR_PITCH_DET_0
-14 0x1000 //RX_THR_PITCH_DET_1
-15 0x0800 //RX_THR_PITCH_DET_2
-16 0x0008 //RX_PITCH_BFR_LEN
-17 0x0003 //RX_SBD_PITCH_DET
-18 0x0100 //RX_PP_RESRV_0
-19 0x0020 //RX_PP_RESRV_1
-20 0x0400 //RX_N_SN_EST
-21 0x000C //RX_N2_SN_EST
-22 0x0006 //RX_NS_LVL_CTRL
-23 0x9000 //RX_THR_SN_EST
-24 0x7CCD //RX_LAMBDA_PFILT
-25 0x000A //RX_MUTE_PERIOD
-26 0x0190 //RX_FADE_IN_PERIOD
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-30 0x0002 //RX_EXTRA_NS_L
-31 0x0800 //RX_EXTRA_NS_A
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-35 0x199A //RX_A_POST_FLT
-36 0x0000 //RX_LMT_THRD
-37 0x4000 //RX_LMT_ALPHA
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-111 0x0000 //RX_FILTINDX
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-125 0x7C00 //RX_LAMBDA_PKA_FP
-126 0x2000 //RX_TPKA_FP
-127 0x2000 //RX_MIN_G_FP
-128 0x0080 //RX_MAX_G_FP
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-131 0x0000 //RX_MAXLEVEL_CNG
-132 0x3000 //RX_BWE_UV_TH
-133 0x3000 //RX_BWE_UV_TH2
-134 0x1800 //RX_BWE_UV_TH3
-135 0x1000 //RX_BWE_V_TH
-136 0x04CD //RX_BWE_GAIN1_V_TH1
-137 0x0F33 //RX_BWE_GAIN1_V_TH2
-138 0x7333 //RX_BWE_UV_EQ
-139 0x199A //RX_BWE_V_EQ
-140 0x7333 //RX_BWE_TONE_TH
-141 0x0004 //RX_BWE_UV_HOLD_T
-142 0x6CCD //RX_BWE_GAIN2_ALPHA
-143 0x799A //RX_BWE_GAIN3_ALPHA
-144 0x001E //RX_BWE_CUTOFF
-145 0x3000 //RX_BWE_GAINFILL
-146 0x3200 //RX_BWE_MAXTH_TONE
-147 0x2000 //RX_BWE_EQ_0
-148 0x2000 //RX_BWE_EQ_1
-149 0x2000 //RX_BWE_EQ_2
-150 0x2000 //RX_BWE_EQ_3
-151 0x2000 //RX_BWE_EQ_4
-152 0x2000 //RX_BWE_EQ_5
-153 0x2000 //RX_BWE_EQ_6
-154 0x0000 //RX_BWE_RESRV_0
-155 0x0000 //RX_BWE_RESRV_1
-156 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-6 0x3000 //RX_TDDRC_ALPHA_UP_1
-7 0x3000 //RX_TDDRC_ALPHA_UP_2
-8 0x3000 //RX_TDDRC_ALPHA_UP_3
-9 0x3000 //RX_TDDRC_ALPHA_UP_4
-27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-33 0x7FFF //RX_TDDRC_LIMITER_THRD
-34 0x0800 //RX_TDDRC_LIMITER_GAIN
-112 0x0000 //RX_TDDRC_THRD_0
-113 0x0000 //RX_TDDRC_THRD_1
-114 0x7FFF //RX_TDDRC_THRD_2
-115 0x7FFF //RX_TDDRC_THRD_3
-116 0x7FFF //RX_TDDRC_SLANT_0
-117 0x7FFF //RX_TDDRC_SLANT_1
-118 0x3000 //RX_TDDRC_ALPHA_UP_0
-119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-120 0x0000 //RX_TDDRC_HMNC_FLAG
-121 0x199A //RX_TDDRC_HMNC_GAIN
-122 0x0001 //RX_TDDRC_SMT_FLAG
-123 0x0CCD //RX_TDDRC_SMT_W
-124 0x0155 //RX_TDDRC_DRC_GAIN
-38 0x0020 //RX_FDEQ_SUBNUM
-39 0x4848 //RX_FDEQ_GAIN_0
-40 0x4848 //RX_FDEQ_GAIN_1
-41 0x4848 //RX_FDEQ_GAIN_2
-42 0x4848 //RX_FDEQ_GAIN_3
-43 0x4848 //RX_FDEQ_GAIN_4
-44 0x4848 //RX_FDEQ_GAIN_5
-45 0x4848 //RX_FDEQ_GAIN_6
-46 0x4848 //RX_FDEQ_GAIN_7
-47 0x4848 //RX_FDEQ_GAIN_8
-48 0x4848 //RX_FDEQ_GAIN_9
-49 0x4848 //RX_FDEQ_GAIN_10
-50 0x4848 //RX_FDEQ_GAIN_11
-51 0x4848 //RX_FDEQ_GAIN_12
-52 0x4848 //RX_FDEQ_GAIN_13
-53 0x4848 //RX_FDEQ_GAIN_14
-54 0x4848 //RX_FDEQ_GAIN_15
-55 0x4848 //RX_FDEQ_GAIN_16
-56 0x4848 //RX_FDEQ_GAIN_17
-57 0x4848 //RX_FDEQ_GAIN_18
-58 0x4848 //RX_FDEQ_GAIN_19
-59 0x4848 //RX_FDEQ_GAIN_20
-60 0x4848 //RX_FDEQ_GAIN_21
-61 0x4848 //RX_FDEQ_GAIN_22
-62 0x4848 //RX_FDEQ_GAIN_23
-63 0x0202 //RX_FDEQ_BIN_0
-64 0x0203 //RX_FDEQ_BIN_1
-65 0x0303 //RX_FDEQ_BIN_2
-66 0x0304 //RX_FDEQ_BIN_3
-67 0x0405 //RX_FDEQ_BIN_4
-68 0x0506 //RX_FDEQ_BIN_5
-69 0x0708 //RX_FDEQ_BIN_6
-70 0x090A //RX_FDEQ_BIN_7
-71 0x0B0C //RX_FDEQ_BIN_8
-72 0x0D0E //RX_FDEQ_BIN_9
-73 0x1013 //RX_FDEQ_BIN_10
-74 0x1719 //RX_FDEQ_BIN_11
-75 0x1B1E //RX_FDEQ_BIN_12
-76 0x1E1E //RX_FDEQ_BIN_13
-77 0x1E28 //RX_FDEQ_BIN_14
-78 0x282C //RX_FDEQ_BIN_15
-79 0x0000 //RX_FDEQ_BIN_16
-80 0x0000 //RX_FDEQ_BIN_17
-81 0x0000 //RX_FDEQ_BIN_18
-82 0x0000 //RX_FDEQ_BIN_19
-83 0x0000 //RX_FDEQ_BIN_20
-84 0x0000 //RX_FDEQ_BIN_21
-85 0x0000 //RX_FDEQ_BIN_22
-86 0x0000 //RX_FDEQ_BIN_23
-87 0x4000 //RX_FDEQ_RESRV_0
-88 0x0320 //RX_FDEQ_RESRV_1
-89 0x0018 //RX_FDDRC_BAND_MARGIN_0
-90 0x0030 //RX_FDDRC_BAND_MARGIN_1
-91 0x0050 //RX_FDDRC_BAND_MARGIN_2
-92 0x0080 //RX_FDDRC_BAND_MARGIN_3
-93 0x0007 //RX_FDDRC_BLOCK_EXP
-94 0x5000 //RX_FDDRC_THRD_2_0
-95 0x5000 //RX_FDDRC_THRD_2_1
-96 0x5000 //RX_FDDRC_THRD_2_2
-97 0x5000 //RX_FDDRC_THRD_2_3
-98 0x6400 //RX_FDDRC_THRD_3_0
-99 0x6400 //RX_FDDRC_THRD_3_1
-100 0x6400 //RX_FDDRC_THRD_3_2
-101 0x6400 //RX_FDDRC_THRD_3_3
-102 0x2000 //RX_FDDRC_SLANT_0_0
-103 0x2000 //RX_FDDRC_SLANT_0_1
-104 0x2000 //RX_FDDRC_SLANT_0_2
-105 0x2000 //RX_FDDRC_SLANT_0_3
-106 0x5333 //RX_FDDRC_SLANT_1_0
-107 0x5333 //RX_FDDRC_SLANT_1_1
-108 0x5333 //RX_FDDRC_SLANT_1_2
-109 0x5333 //RX_FDDRC_SLANT_1_3
-110 0x0000 //RX_FDDRC_RESRV_0
-129 0x0100 //RX_SPK_VOL
-130 0x0000 //RX_VOL_RESRV_0
-#RX 2
-157 0x8064 //RX_RECVFUNC_MODE_0
-158 0x0000 //RX_RECVFUNC_MODE_1
-159 0x0003 //RX_SAMPLINGFREQ_SIG
-160 0x0003 //RX_SAMPLINGFREQ_PROC
-161 0x000A //RX_FRAME_SZ
-162 0x0000 //RX_DELAY_OPT
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-167 0x0800 //RX_PGA
-168 0x7FFF //RX_A_HP
-169 0x0000 //RX_B_PE
-170 0x1800 //RX_THR_PITCH_DET_0
-171 0x1000 //RX_THR_PITCH_DET_1
-172 0x0800 //RX_THR_PITCH_DET_2
-173 0x0008 //RX_PITCH_BFR_LEN
-174 0x0003 //RX_SBD_PITCH_DET
-175 0x0100 //RX_PP_RESRV_0
-176 0x0020 //RX_PP_RESRV_1
-177 0x0400 //RX_N_SN_EST
-178 0x000C //RX_N2_SN_EST
-179 0x0006 //RX_NS_LVL_CTRL
-180 0x9000 //RX_THR_SN_EST
-181 0x7CCD //RX_LAMBDA_PFILT
-182 0x000A //RX_MUTE_PERIOD
-183 0x0190 //RX_FADE_IN_PERIOD
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-187 0x0002 //RX_EXTRA_NS_L
-188 0x0800 //RX_EXTRA_NS_A
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-192 0x199A //RX_A_POST_FLT
-193 0x0000 //RX_LMT_THRD
-194 0x4000 //RX_LMT_ALPHA
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-268 0x0000 //RX_FILTINDX
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-282 0x7C00 //RX_LAMBDA_PKA_FP
-283 0x2000 //RX_TPKA_FP
-284 0x2000 //RX_MIN_G_FP
-285 0x0080 //RX_MAX_G_FP
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-288 0x0000 //RX_MAXLEVEL_CNG
-289 0x3000 //RX_BWE_UV_TH
-290 0x3000 //RX_BWE_UV_TH2
-291 0x1800 //RX_BWE_UV_TH3
-292 0x1000 //RX_BWE_V_TH
-293 0x04CD //RX_BWE_GAIN1_V_TH1
-294 0x0F33 //RX_BWE_GAIN1_V_TH2
-295 0x7333 //RX_BWE_UV_EQ
-296 0x199A //RX_BWE_V_EQ
-297 0x7333 //RX_BWE_TONE_TH
-298 0x0004 //RX_BWE_UV_HOLD_T
-299 0x6CCD //RX_BWE_GAIN2_ALPHA
-300 0x799A //RX_BWE_GAIN3_ALPHA
-301 0x001E //RX_BWE_CUTOFF
-302 0x3000 //RX_BWE_GAINFILL
-303 0x3200 //RX_BWE_MAXTH_TONE
-304 0x2000 //RX_BWE_EQ_0
-305 0x2000 //RX_BWE_EQ_1
-306 0x2000 //RX_BWE_EQ_2
-307 0x2000 //RX_BWE_EQ_3
-308 0x2000 //RX_BWE_EQ_4
-309 0x2000 //RX_BWE_EQ_5
-310 0x2000 //RX_BWE_EQ_6
-311 0x0000 //RX_BWE_RESRV_0
-312 0x0000 //RX_BWE_RESRV_1
-313 0x0000 //RX_BWE_RESRV_2
-#VOL 0
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 1
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 2
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 3
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 4
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 5
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-#VOL 6
-163 0x3000 //RX_TDDRC_ALPHA_UP_1
-164 0x3000 //RX_TDDRC_ALPHA_UP_2
-165 0x3000 //RX_TDDRC_ALPHA_UP_3
-166 0x3000 //RX_TDDRC_ALPHA_UP_4
-184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
-185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
-186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
-189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
-190 0x7FFF //RX_TDDRC_LIMITER_THRD
-191 0x0800 //RX_TDDRC_LIMITER_GAIN
-269 0x0000 //RX_TDDRC_THRD_0
-270 0x0000 //RX_TDDRC_THRD_1
-271 0x7FFF //RX_TDDRC_THRD_2
-272 0x7FFF //RX_TDDRC_THRD_3
-273 0x7FFF //RX_TDDRC_SLANT_0
-274 0x7FFF //RX_TDDRC_SLANT_1
-275 0x3000 //RX_TDDRC_ALPHA_UP_0
-276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
-277 0x0000 //RX_TDDRC_HMNC_FLAG
-278 0x199A //RX_TDDRC_HMNC_GAIN
-279 0x0001 //RX_TDDRC_SMT_FLAG
-280 0x0CCD //RX_TDDRC_SMT_W
-281 0x0155 //RX_TDDRC_DRC_GAIN
-195 0x0020 //RX_FDEQ_SUBNUM
-196 0x4848 //RX_FDEQ_GAIN_0
-197 0x4848 //RX_FDEQ_GAIN_1
-198 0x4848 //RX_FDEQ_GAIN_2
-199 0x4848 //RX_FDEQ_GAIN_3
-200 0x4848 //RX_FDEQ_GAIN_4
-201 0x4848 //RX_FDEQ_GAIN_5
-202 0x4848 //RX_FDEQ_GAIN_6
-203 0x4848 //RX_FDEQ_GAIN_7
-204 0x4848 //RX_FDEQ_GAIN_8
-205 0x4848 //RX_FDEQ_GAIN_9
-206 0x4848 //RX_FDEQ_GAIN_10
-207 0x4848 //RX_FDEQ_GAIN_11
-208 0x4848 //RX_FDEQ_GAIN_12
-209 0x4848 //RX_FDEQ_GAIN_13
-210 0x4848 //RX_FDEQ_GAIN_14
-211 0x4848 //RX_FDEQ_GAIN_15
-212 0x4848 //RX_FDEQ_GAIN_16
-213 0x4848 //RX_FDEQ_GAIN_17
-214 0x4848 //RX_FDEQ_GAIN_18
-215 0x4848 //RX_FDEQ_GAIN_19
-216 0x4848 //RX_FDEQ_GAIN_20
-217 0x4848 //RX_FDEQ_GAIN_21
-218 0x4848 //RX_FDEQ_GAIN_22
-219 0x4848 //RX_FDEQ_GAIN_23
-220 0x0202 //RX_FDEQ_BIN_0
-221 0x0203 //RX_FDEQ_BIN_1
-222 0x0303 //RX_FDEQ_BIN_2
-223 0x0304 //RX_FDEQ_BIN_3
-224 0x0405 //RX_FDEQ_BIN_4
-225 0x0506 //RX_FDEQ_BIN_5
-226 0x0708 //RX_FDEQ_BIN_6
-227 0x090A //RX_FDEQ_BIN_7
-228 0x0B0C //RX_FDEQ_BIN_8
-229 0x0D0E //RX_FDEQ_BIN_9
-230 0x1013 //RX_FDEQ_BIN_10
-231 0x1719 //RX_FDEQ_BIN_11
-232 0x1B1E //RX_FDEQ_BIN_12
-233 0x1E1E //RX_FDEQ_BIN_13
-234 0x1E28 //RX_FDEQ_BIN_14
-235 0x282C //RX_FDEQ_BIN_15
-236 0x0000 //RX_FDEQ_BIN_16
-237 0x0000 //RX_FDEQ_BIN_17
-238 0x0000 //RX_FDEQ_BIN_18
-239 0x0000 //RX_FDEQ_BIN_19
-240 0x0000 //RX_FDEQ_BIN_20
-241 0x0000 //RX_FDEQ_BIN_21
-242 0x0000 //RX_FDEQ_BIN_22
-243 0x0000 //RX_FDEQ_BIN_23
-244 0x4000 //RX_FDEQ_RESRV_0
-245 0x0320 //RX_FDEQ_RESRV_1
-246 0x0018 //RX_FDDRC_BAND_MARGIN_0
-247 0x0030 //RX_FDDRC_BAND_MARGIN_1
-248 0x0050 //RX_FDDRC_BAND_MARGIN_2
-249 0x0080 //RX_FDDRC_BAND_MARGIN_3
-250 0x0007 //RX_FDDRC_BLOCK_EXP
-251 0x5000 //RX_FDDRC_THRD_2_0
-252 0x5000 //RX_FDDRC_THRD_2_1
-253 0x5000 //RX_FDDRC_THRD_2_2
-254 0x5000 //RX_FDDRC_THRD_2_3
-255 0x6400 //RX_FDDRC_THRD_3_0
-256 0x6400 //RX_FDDRC_THRD_3_1
-257 0x6400 //RX_FDDRC_THRD_3_2
-258 0x6400 //RX_FDDRC_THRD_3_3
-259 0x2000 //RX_FDDRC_SLANT_0_0
-260 0x2000 //RX_FDDRC_SLANT_0_1
-261 0x2000 //RX_FDDRC_SLANT_0_2
-262 0x2000 //RX_FDDRC_SLANT_0_3
-263 0x5333 //RX_FDDRC_SLANT_1_0
-264 0x5333 //RX_FDDRC_SLANT_1_1
-265 0x5333 //RX_FDDRC_SLANT_1_2
-266 0x5333 //RX_FDDRC_SLANT_1_3
-267 0x0000 //RX_FDDRC_RESRV_0
-286 0x0100 //RX_SPK_VOL
-287 0x0000 //RX_VOL_RESRV_0
-
-#CASE_NAME BLUETOOTH-RESERVE3-VOICE_GENERIC-FB
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
0 0x0001 //TX_OPERATION_MODE_0
1 0x0000 //TX_OPERATION_MODE_1
2 0x0000 //TX_PATCH_REG
diff --git a/audio/shiba/tuning/fortemedia/HANDSET.dat b/audio/shiba/tuning/fortemedia/HANDSET.dat
index 1cf825c..a2a507c 100644
--- a/audio/shiba/tuning/fortemedia/HANDSET.dat
+++ b/audio/shiba/tuning/fortemedia/HANDSET.dat
Binary files differ
diff --git a/audio/shiba/tuning/fortemedia/HANDSET.mods b/audio/shiba/tuning/fortemedia/HANDSET.mods
index 161c088..8904f54 100644
--- a/audio/shiba/tuning/fortemedia/HANDSET.mods
+++ b/audio/shiba/tuning/fortemedia/HANDSET.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HANDSET
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-09-13 17:44:33
+#SAVE_TIME 2023-12-11 17:50:38
#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -533,8 +533,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x6000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -3228,8 +3228,8 @@
521 0x0000 //TX_GSC_RTOL_TH
522 0x0000 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -5923,8 +5923,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -11313,8 +11313,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x6000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -14008,8 +14008,8 @@
521 0x0000 //TX_GSC_RTOL_TH
522 0x0000 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -16703,8 +16703,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -22093,8 +22093,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -27483,8 +27483,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -32873,8 +32873,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -38263,8 +38263,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -40958,8 +40958,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x6000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -43653,8 +43653,8 @@
521 0x0000 //TX_GSC_RTOL_TH
522 0x0000 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -46348,8 +46348,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -51738,8 +51738,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x6000 //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -54433,8 +54433,8 @@
521 0x0000 //TX_GSC_RTOL_TH
522 0x0000 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -57128,8 +57128,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -62518,8 +62518,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
diff --git a/audio/shiba/tuning/fortemedia/HANDSFREE.dat b/audio/shiba/tuning/fortemedia/HANDSFREE.dat
index 1180156..59aa956 100644
--- a/audio/shiba/tuning/fortemedia/HANDSFREE.dat
+++ b/audio/shiba/tuning/fortemedia/HANDSFREE.dat
Binary files differ
diff --git a/audio/shiba/tuning/fortemedia/HANDSFREE.mods b/audio/shiba/tuning/fortemedia/HANDSFREE.mods
index 2b2a1e7..c22a849 100644
--- a/audio/shiba/tuning/fortemedia/HANDSFREE.mods
+++ b/audio/shiba/tuning/fortemedia/HANDSFREE.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HANDSFREE
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-09-13 17:44:57
+#SAVE_TIME 2023-12-11 17:37:01
#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -3228,8 +3228,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
diff --git a/audio/shiba/tuning/fortemedia/HEADSET.dat b/audio/shiba/tuning/fortemedia/HEADSET.dat
index ad04751..b4a08d0 100644
--- a/audio/shiba/tuning/fortemedia/HEADSET.dat
+++ b/audio/shiba/tuning/fortemedia/HEADSET.dat
Binary files differ
diff --git a/audio/shiba/tuning/fortemedia/HEADSET.mods b/audio/shiba/tuning/fortemedia/HEADSET.mods
index 945c0f4..ad8943a 100644
--- a/audio/shiba/tuning/fortemedia/HEADSET.mods
+++ b/audio/shiba/tuning/fortemedia/HEADSET.mods
@@ -3,7 +3,7 @@
#EXPORT_FLAG HEADSET
#PARAM_MODE FULL
#SAVE_MODE 3
-#SAVE_TIME 2023-09-13 17:45:47
+#SAVE_TIME 2023-12-11 17:36:58
#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
#PARAM_TYPE TX+2RX
@@ -30178,8 +30178,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
@@ -70603,8 +70603,8 @@
521 0x3A98 //TX_GSC_RTOL_TH
522 0x3A98 //TX_GSC_RTOH_TH
523 0x7E2C //TX_WIDE2_MEANHTH
-524 0x0000 //TX_DR_RESRV_5
-525 0x0000 //TX_DR_RESRV_6
+524 0x0064 //TX_DR_RESRV_5
+525 0x1000 //TX_DR_RESRV_6
526 0x122E //TX_DR_RESRV_7
527 0x1100 //TX_DR_RESRV_8
528 0x1333 //TX_WIND_MARK_TH
diff --git a/avf/Android.bp b/avf/Android.bp
new file mode 100644
index 0000000..d707db1
--- /dev/null
+++ b/avf/Android.bp
@@ -0,0 +1,22 @@
+//
+// Copyright (C) 2023 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+prebuilt_etc {
+ name: "shusky_assignable_devices.xml",
+ src: "assignable_devices.xml",
+ filename: "assignable_devices.xml",
+ vendor: true,
+ relative_install_path: "avf",
+}
diff --git a/avf/assignable_devices.xml b/avf/assignable_devices.xml
new file mode 100644
index 0000000..baacffc
--- /dev/null
+++ b/avf/assignable_devices.xml
@@ -0,0 +1,22 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- Copyright 2023 The Android Open Source Project
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+-->
+<devices>
+ <device>
+ <kind>eh</kind>
+ <dtbo_label>eh</dtbo_label>
+ <sysfs_path>/sys/bus/platform/devices/16d00000.eh</sysfs_path>
+ </device>
+</devices>
diff --git a/bluetooth/bt_vendor_overlay.conf b/bluetooth/bt_vendor_overlay.conf
index 82f1e65..e85c15f 100644
--- a/bluetooth/bt_vendor_overlay.conf
+++ b/bluetooth/bt_vendor_overlay.conf
@@ -3,9 +3,6 @@
# Uart port name
UartPort = /dev/ttySAC18
-# Userial type
-UserialType = 2
-
# <boolean> Enable check whether let aoc controls power pin
AocPowerPinCtrlCheckEnable = true
@@ -17,6 +14,9 @@
# supported by BT firmware.
HwStageWithOldChipFwNoLongerSupport = PROTO1.0-PROTO1.1
+# <boolean> APM Uart skip suspend to aovid hold system too long when BT using AOC UART
+ApmUartSkipSuspend = true
+
# Sar backOff high resolution support
SarBackOffHighResolution = true
diff --git a/bluetooth/bt_vendor_overlay_ripcurrent.conf b/bluetooth/bt_vendor_overlay_ripcurrent.conf
index a4a91d5..2473a1b 100644
--- a/bluetooth/bt_vendor_overlay_ripcurrent.conf
+++ b/bluetooth/bt_vendor_overlay_ripcurrent.conf
@@ -3,9 +3,6 @@
# Uart port name
UartPort = /dev/ttySAC18
-# Userial type
-UserialType = 2
-
# Sar backOff high resolution support
SarBackOffHighResolution = true
diff --git a/bluetooth/le_audio_codec_capabilities.xml b/bluetooth/le_audio_codec_capabilities.xml
index f277589..d988d1b 100644
--- a/bluetooth/le_audio_codec_capabilities.xml
+++ b/bluetooth/le_audio_codec_capabilities.xml
@@ -32,6 +32,9 @@
<scenario encode="OneChanMono_24_2" decode="invalid"/>
<scenario encode="TwoChanStereo_24_2" decode="invalid"/>
<scenario encode="OneChanStereo_24_2" decode="invalid"/>
+ <scenario encode="OneChanMono_48_2" decode="invalid"/>
+ <scenario encode="TwoChanStereo_48_2" decode="invalid"/>
+ <scenario encode="OneChanStereo_48_2" decode="invalid"/>
<scenario encode="OneChanMono_48_4" decode="invalid"/>
<scenario encode="TwoChanStereo_48_4" decode="invalid"/>
<scenario encode="OneChanStereo_48_4" decode="invalid"/>
@@ -44,6 +47,8 @@
<scenario encode="OneChanStereo_16_2" decode="OneChanMono_16_2"/>
<scenario encode="TwoChanStereo_16_2" decode="OneChanMono_16_2"/>
<scenario encode="OneChanMono_16_2" decode="OneChanMono_16_2"/>
+ <scenario encode="OneChanStereo_32_2" decode="OneChanStereo_32_2"/>
+ <scenario encode="OneChanStereo_32_2" decode="OneChanMono_32_2"/>
<scenario encode="TwoChanStereo_32_2" decode="OneChanMono_32_2"/>
<scenario encode="OneChanMono_32_2" decode="OneChanMono_32_2"/>
<!-- broadcast -->
@@ -62,8 +67,12 @@
<configuration name="OneChanMono_24_2" codecConfiguration="LC3_24k_2" strategyConfiguration="MONO_ONE_CIS_PER_DEVICE"/>
<configuration name="TwoChanStereo_24_2" codecConfiguration="LC3_24k_2" strategyConfiguration="STEREO_TWO_CISES_PER_DEVICE"/>
<configuration name="OneChanStereo_24_2" codecConfiguration="LC3_24k_2" strategyConfiguration="STEREO_ONE_CIS_PER_DEVICE"/>
+ <configuration name="OneChanStereo_32_2" codecConfiguration="LC3_32k_2" strategyConfiguration="STEREO_ONE_CIS_PER_DEVICE"/>
<configuration name="OneChanMono_32_2" codecConfiguration="LC3_32k_2" strategyConfiguration="MONO_ONE_CIS_PER_DEVICE"/>
<configuration name="TwoChanStereo_32_2" codecConfiguration="LC3_32k_2" strategyConfiguration="STEREO_TWO_CISES_PER_DEVICE"/>
+ <configuration name="OneChanMono_48_2" codecConfiguration="LC3_48k_2" strategyConfiguration="MONO_ONE_CIS_PER_DEVICE"/>
+ <configuration name="TwoChanStereo_48_2" codecConfiguration="LC3_48k_2" strategyConfiguration="STEREO_TWO_CISES_PER_DEVICE"/>
+ <configuration name="OneChanStereo_48_2" codecConfiguration="LC3_48k_2" strategyConfiguration="STEREO_ONE_CIS_PER_DEVICE"/>
<configuration name="OneChanMono_48_4" codecConfiguration="LC3_48k_4" strategyConfiguration="MONO_ONE_CIS_PER_DEVICE"/>
<configuration name="TwoChanStereo_48_4" codecConfiguration="LC3_48k_4" strategyConfiguration="STEREO_TWO_CISES_PER_DEVICE"/>
<configuration name="OneChanStereo_48_4" codecConfiguration="LC3_48k_4" strategyConfiguration="STEREO_ONE_CIS_PER_DEVICE"/>
diff --git a/camera/camera.mk b/camera/camera.mk
new file mode 100644
index 0000000..6b2a553
--- /dev/null
+++ b/camera/camera.mk
@@ -0,0 +1,24 @@
+#
+# Copyright (C) 2023 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+ifeq ($(CAMERA_PRODUCT),)
+$(error CAMERA_PRODUCT is not set.)
+endif
+
+# go/lyric-soong-variables
+$(call soong_config_set,lyric,camera_hardware,$(CAMERA_PRODUCT))
+$(call soong_config_set,lyric,tuning_product,$(CAMERA_PRODUCT))
+$(call soong_config_set,google3a_config,target_device,$(CAMERA_PRODUCT))
diff --git a/conf/init.husky.rc b/conf/init.husky.rc
index 1b81446..17b081e 100644
--- a/conf/init.husky.rc
+++ b/conf/init.husky.rc
@@ -1,9 +1,6 @@
# Husky specific init.rc
import /vendor/etc/init/hw/init.zuma.rc
-on early-init && property:ro.product.name=husky_fullmte
- export SCUDO_OPTIONS allocation_ring_buffer_size=131072
-
on init && property:ro.vendor.factory=1
import /vendor/etc/init/hw/init.factory.rc
@@ -64,57 +61,23 @@
chown system system /mnt/vendor/persist/haptics
chown system system /mnt/vendor/persist/haptics/cs40l26.cal
- chown system system /sys/bus/i2c/devices/6-0043/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/5-0043/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/4-0043/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/6-0043/calibration/q_stored
- chown system system /sys/bus/i2c/devices/5-0043/calibration/q_stored
- chown system system /sys/bus/i2c/devices/4-0043/calibration/q_stored
- chown system system /sys/bus/i2c/devices/6-0043/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/5-0043/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/4-0043/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/6-0043/default/vibe_state
- chown system system /sys/bus/i2c/devices/5-0043/default/vibe_state
- chown system system /sys/bus/i2c/devices/4-0043/default/vibe_state
- chown system system /sys/bus/i2c/devices/6-0043/default/num_waves
- chown system system /sys/bus/i2c/devices/5-0043/default/num_waves
- chown system system /sys/bus/i2c/devices/4-0043/default/num_waves
- chown system system /sys/bus/i2c/devices/6-0043/default/f0_offset
- chown system system /sys/bus/i2c/devices/5-0043/default/f0_offset
- chown system system /sys/bus/i2c/devices/4-0043/default/f0_offset
- chown system system /sys/bus/i2c/devices/6-0043/default/owt_free_space
- chown system system /sys/bus/i2c/devices/5-0043/default/owt_free_space
- chown system system /sys/bus/i2c/devices/4-0043/default/owt_free_space
- chown system system /sys/bus/i2c/devices/6-0043/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/5-0043/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/4-0043/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/6-0043/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/5-0043/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/4-0043/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/6-0043/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/5-0043/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/4-0043/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_env_rel_coef
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_env_rel_coef
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_env_rel_coef
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_rise_headroom
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_rise_headroom
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_rise_headroom
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_fall_headroom
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_fall_headroom
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_fall_headroom
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_enable
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_enable
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_enable
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_tx_lvl_thresh_fs
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_tx_lvl_thresh_fs
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_tx_lvl_thresh_fs
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_tx_lvl_hold_off_ms
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_tx_lvl_hold_off_ms
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_tx_lvl_hold_off_ms
- chown system system /sys/bus/i2c/devices/6-0043/default/pm_active_timeout_ms
- chown system system /sys/bus/i2c/devices/5-0043/default/pm_active_timeout_ms
- chown system system /sys/bus/i2c/devices/4-0043/default/pm_active_timeout_ms
+ chown system system /sys/bus/i2c/devices/0-0043/calibration/f0_stored
+ chown system system /sys/bus/i2c/devices/0-0043/calibration/q_stored
+ chown system system /sys/bus/i2c/devices/0-0043/calibration/redc_stored
+ chown system system /sys/bus/i2c/devices/0-0043/default/vibe_state
+ chown system system /sys/bus/i2c/devices/0-0043/default/num_waves
+ chown system system /sys/bus/i2c/devices/0-0043/default/f0_offset
+ chown system system /sys/bus/i2c/devices/0-0043/default/owt_free_space
+ chown system system /sys/bus/i2c/devices/0-0043/default/f0_comp_enable
+ chown system system /sys/bus/i2c/devices/0-0043/default/redc_comp_enable
+ chown system system /sys/bus/i2c/devices/0-0043/default/delay_before_stop_playback_us
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_env_rel_coef
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_rise_headroom
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_fall_headroom
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_enable
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_tx_lvl_thresh_fs
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_tx_lvl_hold_off_ms
+ chown system system /sys/bus/i2c/devices/0-0043/default/pm_active_timeout_ms
enable vendor.vibrator.cs40l26
diff --git a/conf/init.ripcurrent.rc b/conf/init.ripcurrent.rc
index b4a3caf..bcb8c07 100644
--- a/conf/init.ripcurrent.rc
+++ b/conf/init.ripcurrent.rc
@@ -48,66 +48,26 @@
chown system system /mnt/vendor/persist/haptics/cs40l26.cal
chown system system /mnt/vendor/persist/haptics/cs40l26_dual.cal
- chown system system /sys/bus/i2c/devices/6-0043/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/5-0043/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/4-0043/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/6-0042/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/5-0042/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/4-0042/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/6-0043/calibration/q_stored
- chown system system /sys/bus/i2c/devices/5-0043/calibration/q_stored
- chown system system /sys/bus/i2c/devices/4-0043/calibration/q_stored
- chown system system /sys/bus/i2c/devices/6-0042/calibration/q_stored
- chown system system /sys/bus/i2c/devices/5-0042/calibration/q_stored
- chown system system /sys/bus/i2c/devices/4-0042/calibration/q_stored
- chown system system /sys/bus/i2c/devices/6-0043/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/5-0043/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/4-0043/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/6-0042/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/5-0042/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/4-0042/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/6-0043/default/vibe_state
- chown system system /sys/bus/i2c/devices/5-0043/default/vibe_state
- chown system system /sys/bus/i2c/devices/4-0043/default/vibe_state
- chown system system /sys/bus/i2c/devices/6-0042/default/vibe_state
- chown system system /sys/bus/i2c/devices/5-0042/default/vibe_state
- chown system system /sys/bus/i2c/devices/4-0042/default/vibe_state
- chown system system /sys/bus/i2c/devices/6-0043/default/num_waves
- chown system system /sys/bus/i2c/devices/5-0043/default/num_waves
- chown system system /sys/bus/i2c/devices/4-0043/default/num_waves
- chown system system /sys/bus/i2c/devices/6-0042/default/num_waves
- chown system system /sys/bus/i2c/devices/5-0042/default/num_waves
- chown system system /sys/bus/i2c/devices/4-0042/default/num_waves
- chown system system /sys/bus/i2c/devices/6-0043/default/f0_offset
- chown system system /sys/bus/i2c/devices/5-0043/default/f0_offset
- chown system system /sys/bus/i2c/devices/4-0043/default/f0_offset
- chown system system /sys/bus/i2c/devices/6-0042/default/f0_offset
- chown system system /sys/bus/i2c/devices/5-0042/default/f0_offset
- chown system system /sys/bus/i2c/devices/4-0042/default/f0_offset
- chown system system /sys/bus/i2c/devices/6-0043/default/owt_free_space
- chown system system /sys/bus/i2c/devices/5-0043/default/owt_free_space
- chown system system /sys/bus/i2c/devices/4-0043/default/owt_free_space
- chown system system /sys/bus/i2c/devices/6-0042/default/owt_free_space
- chown system system /sys/bus/i2c/devices/5-0042/default/owt_free_space
- chown system system /sys/bus/i2c/devices/4-0042/default/owt_free_space
- chown system system /sys/bus/i2c/devices/6-0043/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/5-0043/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/4-0043/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/6-0042/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/5-0042/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/4-0042/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/6-0043/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/5-0043/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/4-0043/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/6-0042/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/5-0042/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/4-0042/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/6-0043/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/5-0043/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/4-0043/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/6-0042/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/5-0042/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/4-0042/default/delay_before_stop_playback_us
+ chown system system /sys/bus/i2c/devices/0-0043/calibration/f0_stored
+ chown system system /sys/bus/i2c/devices/0-0042/calibration/f0_stored
+ chown system system /sys/bus/i2c/devices/0-0043/calibration/q_stored
+ chown system system /sys/bus/i2c/devices/0-0042/calibration/q_stored
+ chown system system /sys/bus/i2c/devices/0-0043/calibration/redc_stored
+ chown system system /sys/bus/i2c/devices/0-0042/calibration/redc_stored
+ chown system system /sys/bus/i2c/devices/0-0043/default/vibe_state
+ chown system system /sys/bus/i2c/devices/0-0042/default/vibe_state
+ chown system system /sys/bus/i2c/devices/0-0043/default/num_waves
+ chown system system /sys/bus/i2c/devices/0-0042/default/num_waves
+ chown system system /sys/bus/i2c/devices/0-0043/default/f0_offset
+ chown system system /sys/bus/i2c/devices/0-0042/default/f0_offset
+ chown system system /sys/bus/i2c/devices/0-0043/default/owt_free_space
+ chown system system /sys/bus/i2c/devices/0-0042/default/owt_free_space
+ chown system system /sys/bus/i2c/devices/0-0043/default/f0_comp_enable
+ chown system system /sys/bus/i2c/devices/0-0042/default/f0_comp_enable
+ chown system system /sys/bus/i2c/devices/0-0043/default/redc_comp_enable
+ chown system system /sys/bus/i2c/devices/0-0042/default/redc_comp_enable
+ chown system system /sys/bus/i2c/devices/0-0043/default/delay_before_stop_playback_us
+ chown system system /sys/bus/i2c/devices/0-0042/default/delay_before_stop_playback_us
enable vendor.vibrator.cs40l26
enable vendor.vibrator.cs40l26-dual
diff --git a/conf/init.shiba.rc b/conf/init.shiba.rc
index e4c97a2..8c88141 100644
--- a/conf/init.shiba.rc
+++ b/conf/init.shiba.rc
@@ -1,9 +1,6 @@
# Shiba specific init.rc
import /vendor/etc/init/hw/init.zuma.rc
-on early-init && property:ro.product.name=shiba_fullmte
- export SCUDO_OPTIONS allocation_ring_buffer_size=131072
-
on init && property:ro.vendor.factory=1
import /vendor/etc/init/hw/init.factory.rc
@@ -60,57 +57,23 @@
chown system system /mnt/vendor/persist/haptics
chown system system /mnt/vendor/persist/haptics/cs40l26.cal
- chown system system /sys/bus/i2c/devices/6-0043/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/5-0043/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/4-0043/calibration/f0_stored
- chown system system /sys/bus/i2c/devices/6-0043/calibration/q_stored
- chown system system /sys/bus/i2c/devices/5-0043/calibration/q_stored
- chown system system /sys/bus/i2c/devices/4-0043/calibration/q_stored
- chown system system /sys/bus/i2c/devices/6-0043/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/5-0043/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/4-0043/calibration/redc_stored
- chown system system /sys/bus/i2c/devices/6-0043/default/vibe_state
- chown system system /sys/bus/i2c/devices/5-0043/default/vibe_state
- chown system system /sys/bus/i2c/devices/4-0043/default/vibe_state
- chown system system /sys/bus/i2c/devices/6-0043/default/num_waves
- chown system system /sys/bus/i2c/devices/5-0043/default/num_waves
- chown system system /sys/bus/i2c/devices/4-0043/default/num_waves
- chown system system /sys/bus/i2c/devices/6-0043/default/f0_offset
- chown system system /sys/bus/i2c/devices/5-0043/default/f0_offset
- chown system system /sys/bus/i2c/devices/4-0043/default/f0_offset
- chown system system /sys/bus/i2c/devices/6-0043/default/owt_free_space
- chown system system /sys/bus/i2c/devices/5-0043/default/owt_free_space
- chown system system /sys/bus/i2c/devices/4-0043/default/owt_free_space
- chown system system /sys/bus/i2c/devices/6-0043/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/5-0043/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/4-0043/default/f0_comp_enable
- chown system system /sys/bus/i2c/devices/6-0043/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/5-0043/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/4-0043/default/redc_comp_enable
- chown system system /sys/bus/i2c/devices/6-0043/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/5-0043/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/4-0043/default/delay_before_stop_playback_us
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_env_rel_coef
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_env_rel_coef
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_env_rel_coef
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_rise_headroom
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_rise_headroom
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_rise_headroom
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_fall_headroom
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_fall_headroom
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_fall_headroom
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_enable
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_enable
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_enable
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_tx_lvl_thresh_fs
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_tx_lvl_thresh_fs
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_tx_lvl_thresh_fs
- chown system system /sys/bus/i2c/devices/6-0043/dbc/dbc_tx_lvl_hold_off_ms
- chown system system /sys/bus/i2c/devices/5-0043/dbc/dbc_tx_lvl_hold_off_ms
- chown system system /sys/bus/i2c/devices/4-0043/dbc/dbc_tx_lvl_hold_off_ms
- chown system system /sys/bus/i2c/devices/6-0043/default/pm_active_timeout_ms
- chown system system /sys/bus/i2c/devices/5-0043/default/pm_active_timeout_ms
- chown system system /sys/bus/i2c/devices/4-0043/default/pm_active_timeout_ms
+ chown system system /sys/bus/i2c/devices/0-0043/calibration/f0_stored
+ chown system system /sys/bus/i2c/devices/0-0043/calibration/q_stored
+ chown system system /sys/bus/i2c/devices/0-0043/calibration/redc_stored
+ chown system system /sys/bus/i2c/devices/0-0043/default/vibe_state
+ chown system system /sys/bus/i2c/devices/0-0043/default/num_waves
+ chown system system /sys/bus/i2c/devices/0-0043/default/f0_offset
+ chown system system /sys/bus/i2c/devices/0-0043/default/owt_free_space
+ chown system system /sys/bus/i2c/devices/0-0043/default/f0_comp_enable
+ chown system system /sys/bus/i2c/devices/0-0043/default/redc_comp_enable
+ chown system system /sys/bus/i2c/devices/0-0043/default/delay_before_stop_playback_us
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_env_rel_coef
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_rise_headroom
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_fall_headroom
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_enable
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_tx_lvl_thresh_fs
+ chown system system /sys/bus/i2c/devices/0-0043/dbc/dbc_tx_lvl_hold_off_ms
+ chown system system /sys/bus/i2c/devices/0-0043/default/pm_active_timeout_ms
enable vendor.vibrator.cs40l26
diff --git a/device-husky.mk b/device-husky.mk
index 7ef9b87..003e33d 100644
--- a/device-husky.mk
+++ b/device-husky.mk
@@ -14,21 +14,28 @@
# limitations under the License.
#
+# Restrict the visibility of Android.bp files to improve build analysis time
+$(call inherit-product-if-exists, vendor/google/products/sources_pixel.mk)
+
TARGET_KERNEL_DIR ?= device/google/shusky-kernel
-TARGET_BOARD_KERNEL_HEADERS := device/google/shusky-kernel/kernel-headers
+TARGET_BOARD_KERNEL_HEADERS ?= device/google/shusky-kernel/kernel-headers
LOCAL_PATH := device/google/shusky
ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
USE_UWBFIELDTESTQM := true
endif
+ifeq ($(filter factory_husky, $(TARGET_PRODUCT)),)
+ include device/google/shusky/uwb/uwb_calibration.mk
+endif
+
$(call inherit-product-if-exists, vendor/google_devices/shusky/prebuilts/device-vendor-husky.mk)
$(call inherit-product-if-exists, vendor/google_devices/zuma/prebuilts/device-vendor.mk)
$(call inherit-product-if-exists, vendor/google_devices/zuma/proprietary/device-vendor.mk)
$(call inherit-product-if-exists, vendor/google_devices/shusky/proprietary/husky/device-vendor-husky.mk)
$(call inherit-product-if-exists, vendor/google_devices/husky/proprietary/device-vendor.mk)
-$(call inherit-product-if-exists, vendor/qorvo/uwb/qm35-hal/Device.mk)
+$(call inherit-product-if-exists, vendor/qorvo/uwb/qm35-hal-r63/Device.mk)
$(call inherit-product-if-exists, vendor/google_devices/shusky/proprietary/WallpapersHusky.mk)
# display
@@ -39,7 +46,10 @@
device/google/shusky/husky/display_colordata_dev_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_colordata_dev_cal0.pb \
device/google/shusky/husky/display_golden_google-hk3_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_golden_google-hk3_cal0.pb
+CAMERA_PRODUCT ?= husky
+
include device/google/shusky/audio/husky/audio-tables.mk
+include device/google/shusky/camera/camera.mk
include device/google/zuma/device-shipping-common.mk
include hardware/google/pixel/vibrator/cs40l26/device.mk
include device/google/gs-common/bcmbt/bluetooth.mk
@@ -47,11 +57,6 @@
include device/google/gs-common/touch/gti/gti.mk
include device/google/gs-common/touch/touchinspector/touchinspector.mk
-# go/lyric-soong-variables
-$(call soong_config_set,lyric,camera_hardware,husky)
-$(call soong_config_set,lyric,tuning_product,husky)
-$(call soong_config_set,google3a_config,target_device,husky)
-
# Init files
PRODUCT_COPY_FILES += \
device/google/shusky/conf/init.husky.rc:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.husky.rc
@@ -67,10 +72,6 @@
device/google/shusky/husky/radio/husky_camera_rear_tele_mipi_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/camera_rear_tele_mipi_coex_table.csv \
device/google/shusky/husky/radio/husky_display_primary_mipi_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/display_primary_mipi_coex_table.csv
-# Camera
-PRODUCT_COPY_FILES += \
- device/google/shusky/media_profiles_husky.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml
-
# NFC
PRODUCT_COPY_FILES += \
frameworks/native/data/etc/android.hardware.nfc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.xml \
@@ -82,7 +83,7 @@
device/google/shusky/nfc/libnfc-nci.conf:$(TARGET_COPY_OUT_PRODUCT)/etc/libnfc-nci.conf
PRODUCT_PACKAGES += \
- NfcNci \
+ $(RELEASE_PACKAGE_NFC_STACK) \
Tag \
android.hardware.nfc-service.st
@@ -196,14 +197,18 @@
PRODUCT_COPY_FILES += \
device/google/shusky/bluetooth/le_audio_codec_capabilities.xml:$(TARGET_COPY_OUT_VENDOR)/etc/le_audio_codec_capabilities.xml
+# LE Audio Unicast Allowlist
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.leaudio.allow_list=SM-R510
+
# Bluetooth LE Audio CIS handover to SCO
# Set the property only for the controller couldn't support CIS/SCO simultaneously. More detailed in b/242908683.
PRODUCT_PRODUCT_PROPERTIES += \
persist.bluetooth.leaudio.notify.idle.during.call=true
-# Not support LE Audio dual mic SWB call based on the current launch strategy
+# Support LE Audio dual mic SWB call
PRODUCT_PRODUCT_PROPERTIES += \
- bluetooth.leaudio.dual_bidirection_swb.supported=false
+ bluetooth.leaudio.dual_bidirection_swb.supported=true
# Support One-Handed mode
PRODUCT_PRODUCT_PROPERTIES += \
@@ -252,6 +257,17 @@
# Trusty liboemcrypto.so
PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts
+ifneq (,$(filter AP1%,$(RELEASE_PLATFORM_VERSION)))
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts/trusty/24Q1
+else ifneq (,$(filter AP2%,$(RELEASE_PLATFORM_VERSION)))
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts/trusty/24Q2
+else
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts/trusty/trunk
+endif
+
+# UWB
+PRODUCT_SOONG_NAMESPACES += \
+ device/google/shusky/uwb
# Location
# SDK build system
@@ -278,12 +294,19 @@
persist.device_config.configuration.disable_rescue_party=true
# Fingerprint HAL
-GOODIX_CONFIG_BUILD_VERSION := g7_trusty
-include device/google/gs101/fingerprint/udfps_common.mk
-ifeq ($(filter factory%, $(TARGET_PRODUCT)),)
-include device/google/gs101/fingerprint/udfps_shipping.mk
+ifneq (,$(filter AP1%,$(RELEASE_PLATFORM_VERSION)))
+APEX_FPS_TA_DIR := //vendor/google_devices/shusky/prebuilts/firmware/fingerprint/24Q1
+else ifneq (,$(filter AP2%,$(RELEASE_PLATFORM_VERSION)))
+APEX_FPS_TA_DIR := //vendor/google_devices/shusky/prebuilts/firmware/fingerprint/24Q2
else
-include device/google/gs101/fingerprint/udfps_factory.mk
+APEX_FPS_TA_DIR := //vendor/google_devices/shusky/prebuilts/firmware/fingerprint/trunk
+endif
+GOODIX_CONFIG_BUILD_VERSION := g7_trusty
+$(call inherit-product-if-exists, vendor/goodix/udfps/configuration/udfps_common.mk)
+ifeq ($(filter factory%, $(TARGET_PRODUCT)),)
+$(call inherit-product-if-exists, vendor/goodix/udfps/configuration/udfps_shipping.mk)
+else
+$(call inherit-product-if-exists, vendor/goodix/udfps/configuration/udfps_factory.mk)
endif
PRODUCT_VENDOR_PROPERTIES += \
@@ -299,7 +322,10 @@
persist.vendor.camera.front_720P_always_binning=true
# Media Performance Class 14
-PRODUCT_PRODUCT_PROPERTIES += ro.odm.build.media_performance_class=33
+PRODUCT_PRODUCT_PROPERTIES += ro.odm.build.media_performance_class=34
+
+# Modem
+PRODUCT_PROPERTY_OVERRIDES += persist.vendor.radio.volte_mif_off=true
# config of display brightness dimming
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.display.0.brightness.dimming.usage?=1
@@ -334,7 +360,7 @@
ACTUATOR_MODEL := luxshare_ict_081545
ADAPTIVE_HAPTICS_FEATURE := adaptive_haptics_v1
PRODUCT_VENDOR_PROPERTIES += \
- ro.vendor.vibrator.hal.chirp.enabled=0 \
+ persist.vendor.vibrator.hal.chirp.enabled=0 \
ro.vendor.vibrator.hal.device.mass=0.222 \
ro.vendor.vibrator.hal.loc.coeff=2.8 \
persist.vendor.vibrator.hal.context.enable=false \
@@ -352,7 +378,7 @@
# Increment the SVN for any official public releases
PRODUCT_VENDOR_PROPERTIES += \
- ro.vendor.build.svn=6
+ ro.vendor.build.svn=13
# WLC userdebug specific
ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
@@ -395,17 +421,21 @@
# Keyboard height ratio and bottom padding in dp for portrait mode
PRODUCT_PRODUCT_PROPERTIES += \
- ro.com.google.ime.kb_pad_port_b=10.4 \
- ro.com.google.ime.height_ratio=1.0
+ ro.com.google.ime.kb_pad_port_b=10.4
+
+PRODUCT_PRODUCT_PROPERTIES ?= \
+ ro.com.google.ime.height_ratio=1.0
# Enable camera exif model/make reporting
PRODUCT_VENDOR_PROPERTIES += \
persist.vendor.camera.exif_reveal_make_model=true
+# AVF assignable devices xml
+PRODUCT_PACKAGES += shusky_assignable_devices.xml
+
# Enable DeviceAsWebcam support
PRODUCT_VENDOR_PROPERTIES += \
ro.usb.uvc.enabled=true
-# DisplayPort should be disabled by default (b/300167292)
-PRODUCT_VENDOR_PROPERTIES += \
- persist.vendor.usb.displayport.enabled=0
+PRODUCT_PACKAGES += \
+ NfcOverlayHusky \
diff --git a/device-ripcurrent.mk b/device-ripcurrent.mk
index 79406da..0717be5 100644
--- a/device-ripcurrent.mk
+++ b/device-ripcurrent.mk
@@ -14,12 +14,19 @@
# limitations under the License.
#
+# Restrict the visibility of Android.bp files to improve build analysis time
+$(call inherit-product-if-exists, vendor/google/products/sources_pixel.mk)
+
TARGET_KERNEL_DIR ?= device/google/shusky-kernel
-TARGET_BOARD_KERNEL_HEADERS := device/google/shusky-kernel/kernel-headers
+TARGET_BOARD_KERNEL_HEADERS ?= device/google/shusky-kernel/kernel-headers
ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
USE_UWBFIELDTESTQM := true
endif
+ifeq ($(filter factory_ripcurrent, $(TARGET_PRODUCT)),)
+ include device/google/shusky/uwb/uwb_calibration.mk
+endif
+
$(call inherit-product-if-exists, vendor/google_devices/shusky/prebuilts/device-vendor-ripcurrent.mk)
$(call inherit-product-if-exists, vendor/google_devices/zuma/prebuilts/device-vendor.mk)
@@ -27,18 +34,16 @@
$(call inherit-product-if-exists, vendor/google_devices/shusky/proprietary/ripcurrent/device-vendor-ripcurrent.mk)
$(call inherit-product-if-exists, vendor/qorvo/uwb/qm35-hal/Device.mk)
+CAMERA_PRODUCT ?= ripcurrent
+
include device/google/shusky/audio/ripcurrent/audio-tables.mk
+include device/google/shusky/camera/camera.mk
include device/google/zuma/device-shipping-common.mk
include hardware/google/pixel/vibrator/cs40l26/device-stereo.mk
include device/google/gs-common/bcmbt/bluetooth.mk
include device/google/gs-common/gps/brcm/cbd_gps.mk
include device/google/gs-common/touch/stm/stm20.mk
-# go/lyric-soong-variables
-$(call soong_config_set,lyric,camera_hardware,ripcurrent)
-$(call soong_config_set,lyric,tuning_product,ripcurrent)
-$(call soong_config_set,google3a_config,target_device,ripcurrent)
-
# display
DEVICE_PACKAGE_OVERLAYS += device/google/shusky/ripcurrent/overlay
@@ -50,10 +55,6 @@
PRODUCT_COPY_FILES += \
device/google/shusky/conf/init.recovery.device.rc:$(TARGET_COPY_OUT_RECOVERY)/root/init.recovery.ripcurrent.rc
-# Camera
-PRODUCT_COPY_FILES += \
- device/google/shusky/media_profiles_ripcurrent.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml
-
# NFC
PRODUCT_COPY_FILES += \
frameworks/native/data/etc/android.hardware.nfc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.xml \
@@ -66,7 +67,7 @@
device/google/shusky/nfc/libnfc-nci.conf:$(TARGET_COPY_OUT_PRODUCT)/etc/libnfc-nci.conf
PRODUCT_PACKAGES += \
- NfcNci \
+ $(RELEASE_PACKAGE_NFC_STACK) \
Tag \
android.hardware.nfc-service.st
@@ -96,6 +97,10 @@
PRODUCT_PROPERTY_OVERRIDES += \
ro.audio.spatializer_enabled=true
+# DCK properties based on target
+PRODUCT_PROPERTY_OVERRIDES += \
+ ro.gms.dck.eligible_wcc=3
+
# Bluetooth hci_inject test tool
PRODUCT_PACKAGES_DEBUG += \
hci_inject
@@ -166,9 +171,9 @@
PRODUCT_PRODUCT_PROPERTIES += \
persist.bluetooth.leaudio.notify.idle.during.call=true
-# Not support LE Audio dual mic SWB call based on the current launch strategy
+# Support LE Audio dual mic SWB call
PRODUCT_PRODUCT_PROPERTIES += \
- bluetooth.leaudio.dual_bidirection_swb.supported=false
+ bluetooth.leaudio.dual_bidirection_swb.supported=true
# Keymaster HAL
#LOCAL_KEYMASTER_PRODUCT_PACKAGE ?= android.hardware.keymaster@4.1-service
@@ -210,6 +215,17 @@
# Trusty liboemcrypto.so
PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts
+ifneq (,$(filter AP1%,$(RELEASE_PLATFORM_VERSION)))
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts/trusty/24Q1
+else ifneq (,$(filter AP2%,$(RELEASE_PLATFORM_VERSION)))
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts/trusty/24Q2
+else
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts/trusty/trunk
+endif
+
+# UWB
+PRODUCT_SOONG_NAMESPACES += \
+ device/google/shusky/uwb
# Location
# SDK build system
@@ -246,7 +262,7 @@
# Vibrator HAL
ACTUATOR_MODEL := luxshare_ict_081545
PRODUCT_VENDOR_PROPERTIES += \
- ro.vendor.vibrator.hal.chirp.enabled=0 \
+ persist.vendor.vibrator.hal.chirp.enabled=0 \
ro.vendor.vibrator.hal.device.mass=0.222 \
ro.vendor.vibrator.hal.loc.coeff=2.8
diff --git a/device-shiba.mk b/device-shiba.mk
index e523ae0..f7879f6 100644
--- a/device-shiba.mk
+++ b/device-shiba.mk
@@ -14,8 +14,11 @@
# limitations under the License.
#
+# Restrict the visibility of Android.bp files to improve build analysis time
+$(call inherit-product-if-exists, vendor/google/products/sources_pixel.mk)
+
TARGET_KERNEL_DIR ?= device/google/shusky-kernel
-TARGET_BOARD_KERNEL_HEADERS := device/google/shusky-kernel/kernel-headers
+TARGET_BOARD_KERNEL_HEADERS ?= device/google/shusky-kernel/kernel-headers
LOCAL_PATH := device/google/shusky
@@ -27,18 +30,15 @@
$(call inherit-product-if-exists, vendor/google_devices/shusky/proprietary/WallpapersShiba.mk)
DEVICE_PACKAGE_OVERLAYS += device/google/shusky/shiba/overlay
+CAMERA_PRODUCT ?= shiba
include device/google/shusky/audio/shiba/audio-tables.mk
+include device/google/shusky/camera/camera.mk
include device/google/zuma/device-shipping-common.mk
include hardware/google/pixel/vibrator/cs40l26/device.mk
include device/google/gs-common/bcmbt/bluetooth.mk
include device/google/gs-common/touch/gti/gti.mk
-# go/lyric-soong-variables
-$(call soong_config_set,lyric,camera_hardware,shiba)
-$(call soong_config_set,lyric,tuning_product,shiba)
-$(call soong_config_set,google3a_config,target_device,shiba)
-
# Init files
PRODUCT_COPY_FILES += \
device/google/shusky/conf/init.shiba.rc:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.shiba.rc
@@ -54,8 +54,6 @@
device/google/shusky/shiba/radio/shiba_display_primary_mipi_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/display_primary_mipi_coex_table.csv
# Camera
-PRODUCT_COPY_FILES += \
- device/google/shusky/media_profiles_shiba.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml
PRODUCT_PROPERTY_OVERRIDES += \
persist.vendor.camera.rls_range_supported=false
@@ -70,7 +68,7 @@
device/google/shusky/nfc/libnfc-nci.conf:$(TARGET_COPY_OUT_PRODUCT)/etc/libnfc-nci.conf
PRODUCT_PACKAGES += \
- NfcNci \
+ $(RELEASE_PACKAGE_NFC_STACK) \
Tag \
android.hardware.nfc-service.st
@@ -187,14 +185,18 @@
PRODUCT_COPY_FILES += \
device/google/shusky/bluetooth/le_audio_codec_capabilities.xml:$(TARGET_COPY_OUT_VENDOR)/etc/le_audio_codec_capabilities.xml
+# LE Audio Unicast Allowlist
+PRODUCT_PRODUCT_PROPERTIES += \
+ persist.bluetooth.leaudio.allow_list=SM-R510
+
# Bluetooth LE Audio CIS handover to SCO
# Set the property only for the controller couldn't support CIS/SCO simultaneously. More detailed in b/242908683.
PRODUCT_PRODUCT_PROPERTIES += \
persist.bluetooth.leaudio.notify.idle.during.call=true
-# Not support LE Audio dual mic SWB call based on the current launch strategy
+# Support LE Audio dual mic SWB call
PRODUCT_PRODUCT_PROPERTIES += \
- bluetooth.leaudio.dual_bidirection_swb.supported=false
+ bluetooth.leaudio.dual_bidirection_swb.supported=true
# Support One-Handed mode
PRODUCT_PRODUCT_PROPERTIES += \
@@ -242,6 +244,13 @@
# Trusty liboemcrypto.so
PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts
+ifneq (,$(filter AP1%,$(RELEASE_PLATFORM_VERSION)))
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts/trusty/24Q1
+else ifneq (,$(filter AP2%,$(RELEASE_PLATFORM_VERSION)))
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts/trusty/24Q2
+else
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/shusky/prebuilts/trusty/trunk
+endif
# Location
# SDK build system
@@ -268,12 +277,19 @@
persist.device_config.configuration.disable_rescue_party=true
# Fingerprint HAL
-GOODIX_CONFIG_BUILD_VERSION := g7_trusty
-include device/google/gs101/fingerprint/udfps_common.mk
-ifeq ($(filter factory%, $(TARGET_PRODUCT)),)
-include device/google/gs101/fingerprint/udfps_shipping.mk
+ifneq (,$(filter AP1%,$(RELEASE_PLATFORM_VERSION)))
+APEX_FPS_TA_DIR := //vendor/google_devices/shusky/prebuilts/firmware/fingerprint/24Q1
+else ifneq (,$(filter AP2%,$(RELEASE_PLATFORM_VERSION)))
+APEX_FPS_TA_DIR := //vendor/google_devices/shusky/prebuilts/firmware/fingerprint/24Q2
else
-include device/google/gs101/fingerprint/udfps_factory.mk
+APEX_FPS_TA_DIR := //vendor/google_devices/shusky/prebuilts/firmware/fingerprint/trunk
+endif
+GOODIX_CONFIG_BUILD_VERSION := g7_trusty
+$(call inherit-product-if-exists, vendor/goodix/udfps/configuration/udfps_common.mk)
+ifeq ($(filter factory%, $(TARGET_PRODUCT)),)
+$(call inherit-product-if-exists, vendor/goodix/udfps/configuration/udfps_shipping.mk)
+else
+$(call inherit-product-if-exists, vendor/goodix/udfps/configuration/udfps_factory.mk)
endif
# Fingerprint exposure compensation
@@ -281,7 +297,7 @@
persist.vendor.udfps.auto_exposure_compensation_supported=true
# Display
-PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.set_idle_timer_ms=1500
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.set_idle_timer_ms=1000
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.ignore_hdr_camera_layers=true
# lhbm peak brightness delay: decided by kernel
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.primarydisplay.lhbm.frames_to_reach_peak_brightness=0
@@ -306,7 +322,10 @@
persist.vendor.camera.front_720P_always_binning=true
# Media Performance Class 14
-PRODUCT_PRODUCT_PROPERTIES += ro.odm.build.media_performance_class=33
+PRODUCT_PRODUCT_PROPERTIES += ro.odm.build.media_performance_class=34
+
+# Modem
+PRODUCT_PROPERTY_OVERRIDES += persist.vendor.radio.volte_mif_off=true
# Display LBE
PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.display.lbe.supported=1
@@ -315,7 +334,7 @@
ACTUATOR_MODEL := luxshare_ict_081545
ADAPTIVE_HAPTICS_FEATURE := adaptive_haptics_v1
PRODUCT_VENDOR_PROPERTIES += \
- ro.vendor.vibrator.hal.chirp.enabled=0 \
+ persist.vendor.vibrator.hal.chirp.enabled=0 \
ro.vendor.vibrator.hal.device.mass=0.187 \
ro.vendor.vibrator.hal.loc.coeff=2.75 \
persist.vendor.vibrator.hal.context.enable=false \
@@ -333,7 +352,7 @@
# Increment the SVN for any official public releases
PRODUCT_VENDOR_PROPERTIES += \
- ro.vendor.build.svn=6
+ ro.vendor.build.svn=13
# P23 Devices no longer need rlsservice
PRODUCT_VENDOR_PROPERTIES += \
@@ -377,10 +396,12 @@
PRODUCT_VENDOR_PROPERTIES += \
persist.vendor.camera.exif_reveal_make_model=true
+# AVF assignable devices xml
+PRODUCT_PACKAGES += shusky_assignable_devices.xml
+
# Enable DeviceAsWebcam support
PRODUCT_VENDOR_PROPERTIES += \
ro.usb.uvc.enabled=true
-# DisplayPort should be disabled by default (b/300167292)
-PRODUCT_VENDOR_PROPERTIES += \
- persist.vendor.usb.displayport.enabled=0
+PRODUCT_PACKAGES += \
+ NfcOverlayShiba
diff --git a/husky/BoardConfig.mk b/husky/BoardConfig.mk
index 9e35d93..0f5e382 100644
--- a/husky/BoardConfig.mk
+++ b/husky/BoardConfig.mk
@@ -24,7 +24,24 @@
TARGET_BOARD_INFO_FILE := device/google/shusky/board-info.txt
TARGET_BOOTLOADER_BOARD_NAME := husky
-TARGET_SCREEN_DENSITY := 480
+
+RELEASE_GOOGLE_PRODUCT_RADIO_DIR := $(RELEASE_GOOGLE_HUSKY_RADIO_DIR)
+RELEASE_GOOGLE_PRODUCT_RADIOCFG_DIR := $(RELEASE_GOOGLE_HUSKY_RADIOCFG_DIR)
+ifneq (,$(filter AP1%,$(RELEASE_PLATFORM_VERSION)))
+RELEASE_GOOGLE_PRODUCT_BOOTLOADER_DIR := bootloader/24Q1
+else ifneq (,$(filter AP2%,$(RELEASE_PLATFORM_VERSION)))
+RELEASE_GOOGLE_PRODUCT_BOOTLOADER_DIR := bootloader/24Q2
+else
+RELEASE_GOOGLE_PRODUCT_BOOTLOADER_DIR := bootloader/trunk
+endif
+
+
+ifdef PHONE_CAR_BOARD_PRODUCT
+ include vendor/auto/embedded/products/$(PHONE_CAR_BOARD_PRODUCT)/BoardConfig.mk
+else
+ TARGET_SCREEN_DENSITY := 480
+endif
+
BOARD_USES_GENERIC_AUDIO := true
USES_DEVICE_GOOGLE_SHUSKY := true
BOARD_KERNEL_CMDLINE += swiotlb=noforce
@@ -41,3 +58,12 @@
-include vendor/google_devices/husky/proprietary/BoardConfigVendor.mk
include device/google/shusky-sepolicy/husky-sepolicy.mk
include device/google/shusky/wifi/BoardConfig-wifi.mk
+
+# Android Virtualization Framework (AVF) team is using husky with hypervisor in
+# nvhe mode as a development platform to build infrastructure that supports
+# assigning devices to guest VMs.
+#
+# TODO(b/278008514): remove this once we have builds from our kernel branch.
+ifeq ($(HUSKY_ENABLE_DEVICE_ASSIGNMENT), true)
+BOARD_KERNEL_CMDLINE += kvm-arm.mode=nvhe
+endif
diff --git a/husky/overlay/frameworks/base/core/res/res/values/config.xml b/husky/overlay/frameworks/base/core/res/res/values/config.xml
index 327a3af..f03519a 100644
--- a/husky/overlay/frameworks/base/core/res/res/values/config.xml
+++ b/husky/overlay/frameworks/base/core/res/res/values/config.xml
@@ -48,9 +48,6 @@
<!-- 140 nits: (140-2)/(1000-2)*(0.63-0.0)+0.0 = 0.087114228 -->
<item name="config_screenBrightnessSettingDefaultFloat" format="float" type="dimen">0.087114228</item>
- <!-- Allow normal brightness controller feature. -->
- <bool name="config_allowNormalBrightnessControllerFeature">true</bool>
-
<!-- Array of light sensor LUX values to define our levels for auto backlight brightness support.
The N entries of this array define N 1 zones as follows:
Zone 0: 0 <= LUX < array[0]
diff --git a/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_g1mnw_cn.png b/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_g1mnw_cn.png
index 3f41764..bb4344b 100644
--- a/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_g1mnw_cn.png
+++ b/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_g1mnw_cn.png
Binary files differ
diff --git a/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_g1mnw_vn.png b/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_g1mnw_vn.png
index fdccad9..ee4f06a 100644
--- a/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_g1mnw_vn.png
+++ b/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_g1mnw_vn.png
Binary files differ
diff --git a/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_gc3ve_cn.png b/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_gc3ve_cn.png
index 61a015e..0537b4e 100644
--- a/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_gc3ve_cn.png
+++ b/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_gc3ve_cn.png
Binary files differ
diff --git a/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_gc3ve_vn.png b/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_gc3ve_vn.png
index 684a855..8f09460 100644
--- a/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_gc3ve_vn.png
+++ b/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_gc3ve_vn.png
Binary files differ
diff --git a/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_ge9dp_cn.png b/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_ge9dp_cn.png
index 169b4e2..096b56d 100644
--- a/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_ge9dp_cn.png
+++ b/husky/overlay_packages/SettingsHuskyOverlay/res/drawable/regulatory_info_ge9dp_cn.png
Binary files differ
diff --git a/husky/rro_overlays/NfcOverlay/Android.bp b/husky/rro_overlays/NfcOverlay/Android.bp
new file mode 100644
index 0000000..826630f
--- /dev/null
+++ b/husky/rro_overlays/NfcOverlay/Android.bp
@@ -0,0 +1,9 @@
+package {
+ default_applicable_licenses: ["device_google_shusky_license"],
+}
+
+runtime_resource_overlay {
+ name: "NfcOverlayHusky",
+ sdk_version: "current",
+ product_specific: true
+}
diff --git a/husky/rro_overlays/NfcOverlay/AndroidManifest.xml b/husky/rro_overlays/NfcOverlay/AndroidManifest.xml
new file mode 100644
index 0000000..5241aa4
--- /dev/null
+++ b/husky/rro_overlays/NfcOverlay/AndroidManifest.xml
@@ -0,0 +1,27 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- Copyright (C) 2023 The Android Open Source Project
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+-->
+<!-- Pixel specific nfc overlays -->
+<manifest xmlns:android="http://schemas.android.com/apk/res/android"
+ package="com.android.nfc.overlay"
+ android:versionCode="1"
+ android:versionName="1.0">
+ <application android:hasCode="false" />
+ <overlay
+ android:targetPackage="com.android.nfc"
+ android:targetName="NfcCustomization"
+ android:isStatic="true"
+ android:priority="0"/>
+</manifest>
diff --git a/husky/rro_overlays/NfcOverlay/OWNERS b/husky/rro_overlays/NfcOverlay/OWNERS
new file mode 100644
index 0000000..35e9713
--- /dev/null
+++ b/husky/rro_overlays/NfcOverlay/OWNERS
@@ -0,0 +1,2 @@
+# Bug component: 48448
+include platform/packages/apps/Nfc:/OWNERS
diff --git a/husky/rro_overlays/NfcOverlay/res/values/config.xml b/husky/rro_overlays/NfcOverlay/res/values/config.xml
new file mode 100644
index 0000000..20edf75
--- /dev/null
+++ b/husky/rro_overlays/NfcOverlay/res/values/config.xml
@@ -0,0 +1,35 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- Copyright (C) 2022 The Android Open Source Project
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+-->
+<resources>
+ <bool name="nfcc_always_on_allowed">false</bool>
+ <bool name="polling_disable_allowed">true</bool>
+ <string-array name="config_skuSupportsSecureNfc" translatable="false">
+ <item>GC3VE</item>
+ <item>G1MNW</item>
+ <item>GE9DP</item>
+ </string-array>
+ <bool name="tag_intent_app_pref_supported">true</bool>
+ <!-- NFC Antenna Location API -->
+ <integer name="device_width">73</integer>
+ <integer name="device_height">158</integer>
+ <bool name="device_foldable">false</bool>
+ <integer-array name="antenna_x">
+ <item>37</item>
+ </integer-array>
+ <integer-array name="antenna_y">
+ <item>103</item>
+ </integer-array>
+</resources>
diff --git a/husky/rro_overlays/UwbOverlay/res/values/config.xml b/husky/rro_overlays/UwbOverlay/res/values/config.xml
index 7a77d32..bf8d264 100644
--- a/husky/rro_overlays/UwbOverlay/res/values/config.xml
+++ b/husky/rro_overlays/UwbOverlay/res/values/config.xml
@@ -17,4 +17,17 @@
*/
-->
<resources>
+ <!-- When true, the filter engine will alter UWB values to improve accuracy. -->
+ <bool name="enable_filters">true</bool>
+
+ <!-- Enables the AoA conversion primer. This is needed on hardware that does not convert AoA
+ to spherical coordinates, including hardware that does not support elevation.-->
+ <bool name="enable_primer_aoa">true</bool>
+
+ <!-- Whether background ranging is enabled or not
+ If enabled:
+ * Background 3p apps are allowed to open new ranging sessions
+ * When previously foreground 3p apps moves to background, sessions are not terminated
+ -->
+ <bool name = "background_ranging_enabled">true</bool>
</resources>
diff --git a/location/gps.xml b/location/gps.xml
index 774e206..87ced9c 100644
--- a/location/gps.xml
+++ b/location/gps.xml
@@ -35,7 +35,7 @@
SuplVersion="2"
SuplMinorVersion="0"
SuplOtdoaCapable="true"
- SuplOtdoaCapable2="false"
+ SuplOtdoaCapable2="true"
SuplGlonassCapable = "true"
SuplGalileoCapable = "true"
SuplBdsCapable = "true"
diff --git a/location/gps.xml.hk3 b/location/gps.xml.hk3
index 2857dcf..5eb541f 100644
--- a/location/gps.xml.hk3
+++ b/location/gps.xml.hk3
@@ -35,7 +35,7 @@
SuplVersion="2"
SuplMinorVersion="0"
SuplOtdoaCapable="true"
- SuplOtdoaCapable2="false"
+ SuplOtdoaCapable2="true"
SuplGlonassCapable = "true"
SuplGalileoCapable = "true"
SuplBdsCapable = "true"
diff --git a/location/gps.xml.sb3 b/location/gps.xml.sb3
index bceb407..17ad50d 100644
--- a/location/gps.xml.sb3
+++ b/location/gps.xml.sb3
@@ -35,7 +35,7 @@
SuplVersion="2"
SuplMinorVersion="0"
SuplOtdoaCapable="true"
- SuplOtdoaCapable2="false"
+ SuplOtdoaCapable2="true"
SuplGlonassCapable = "true"
SuplGalileoCapable = "true"
SuplBdsCapable = "true"
diff --git a/location/gps_user.xml b/location/gps_user.xml
index 9f3bd02..b9331e6 100644
--- a/location/gps_user.xml
+++ b/location/gps_user.xml
@@ -34,7 +34,7 @@
SuplVersion="2"
SuplMinorVersion="0"
SuplOtdoaCapable="true"
- SuplOtdoaCapable2="false"
+ SuplOtdoaCapable2="true"
SuplGlonassCapable = "true"
SuplGalileoCapable = "true"
SuplBdsCapable = "true"
diff --git a/location/gps_user.xml.hk3 b/location/gps_user.xml.hk3
index 8a1d2b3..c72bfae 100644
--- a/location/gps_user.xml.hk3
+++ b/location/gps_user.xml.hk3
@@ -34,7 +34,7 @@
SuplVersion="2"
SuplMinorVersion="0"
SuplOtdoaCapable="true"
- SuplOtdoaCapable2="false"
+ SuplOtdoaCapable2="true"
SuplGlonassCapable = "true"
SuplGalileoCapable = "true"
SuplBdsCapable = "true"
diff --git a/location/gps_user.xml.sb3 b/location/gps_user.xml.sb3
index f74bce6..0375981 100644
--- a/location/gps_user.xml.sb3
+++ b/location/gps_user.xml.sb3
@@ -34,7 +34,7 @@
SuplVersion="2"
SuplMinorVersion="0"
SuplOtdoaCapable="true"
- SuplOtdoaCapable2="false"
+ SuplOtdoaCapable2="true"
SuplGlonassCapable = "true"
SuplGalileoCapable = "true"
SuplBdsCapable = "true"
diff --git a/media_profiles_husky.xml b/media_profiles_husky.xml
deleted file mode 100644
index 8abc330..0000000
--- a/media_profiles_husky.xml
+++ /dev/null
@@ -1,1808 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>
-<!-- Copyright (C) 2010 The Android Open Source Project
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
--->
-<!DOCTYPE MediaSettings [
-<!ELEMENT MediaSettings (CamcorderProfiles,
- EncoderOutputFileFormat+,
- VideoEncoderCap+,
- AudioEncoderCap+,
- VideoDecoderCap,
- AudioDecoderCap)>
-<!ELEMENT CamcorderProfiles (EncoderProfile+, ImageEncoding+, ImageDecoding, Camera)>
-<!ELEMENT EncoderProfile (Video, Audio)>
-<!ATTLIST EncoderProfile quality (high|low) #REQUIRED>
-<!ATTLIST EncoderProfile fileFormat (mp4|3gp) #REQUIRED>
-<!ATTLIST EncoderProfile duration (30|60) #REQUIRED>
-<!ELEMENT Video EMPTY>
-<!ATTLIST Video codec (h264|h263|m4v) #REQUIRED>
-<!ATTLIST Video bitRate CDATA #REQUIRED>
-<!ATTLIST Video width CDATA #REQUIRED>
-<!ATTLIST Video height CDATA #REQUIRED>
-<!ATTLIST Video frameRate CDATA #REQUIRED>
-<!ELEMENT Audio EMPTY>
-<!ATTLIST Audio codec (amrnb|amrwb|aac) #REQUIRED>
-<!ATTLIST Audio bitRate CDATA #REQUIRED>
-<!ATTLIST Audio sampleRate CDATA #REQUIRED>
-<!ATTLIST Audio channels (1|2) #REQUIRED>
-<!ELEMENT ImageEncoding EMPTY>
-<!ATTLIST ImageEncoding quality (90|80|70|60|50|40) #REQUIRED>
-<!ELEMENT ImageDecoding EMPTY>
-<!ATTLIST ImageDecoding memCap CDATA #REQUIRED>
-<!ELEMENT Camera EMPTY>
-<!ATTLIST Camera previewFrameRate CDATA #REQUIRED>
-<!ELEMENT EncoderOutputFileFormat EMPTY>
-<!ATTLIST EncoderOutputFileFormat name (mp4|3gp) #REQUIRED>
-<!ELEMENT VideoEncoderCap EMPTY>
-<!ATTLIST VideoEncoderCap name (hevc|h264|h263|m4v|wmv) #REQUIRED>
-<!ATTLIST VideoEncoderCap enabled (true|false) #REQUIRED>
-<!ATTLIST VideoEncoderCap minBitRate CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxBitRate CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap minFrameWidth CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxFrameWidth CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap minFrameHeight CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxFrameHeight CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap minFrameRate CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxFrameRate CDATA #REQUIRED>
-<!ELEMENT AudioEncoderCap EMPTY>
-<!ATTLIST AudioEncoderCap name (amrnb|amrwb|aac|wma) #REQUIRED>
-<!ATTLIST AudioEncoderCap enabled (true|false) #REQUIRED>
-<!ATTLIST AudioEncoderCap minBitRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap maxBitRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap minSampleRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap maxSampleRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap minChannels (1|2) #REQUIRED>
-<!ATTLIST AudioEncoderCap maxChannels (1|2) #REQUIRED>
-<!ELEMENT VideoDecoderCap EMPTY>
-<!ATTLIST VideoDecoderCap name (wmv) #REQUIRED>
-<!ATTLIST VideoDecoderCap enabled (true|false) #REQUIRED>
-<!ELEMENT AudioDecoderCap EMPTY>
-<!ATTLIST AudioDecoderCap name (wma) #REQUIRED>
-<!ATTLIST AudioDecoderCap enabled (true|false) #REQUIRED>
-]>
-<!--
- This file is used to declare the multimedia profiles and capabilities
- on an android-powered device.
--->
-<MediaSettings>
- <!-- Each camcorder profile defines a set of predefined configuration parameters -->
- <CamcorderProfiles cameraId="0">
-
- <EncoderProfile quality="high" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="highspeedlow" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="1920"
- height="1080"
- frameRate="240" />
-
- <!-- audio setting is ignored -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="highspeedhigh" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="1920"
- height="1080"
- frameRate="240" />
-
- <!-- audio setting is ignored -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="highspeed1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="1920"
- height="1080"
- frameRate="240" />
-
- <!-- audio setting is ignored -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="1">
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="2">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="3">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="4">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="5">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="6">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="7">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="8">
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <EncoderOutputFileFormat name="3gp" />
- <EncoderOutputFileFormat name="mp4" />
-
- <!--
- If a codec is not enabled, it is invisible to the applications
- In other words, the applications won't be able to use the codec
- or query the capabilities of the codec at all if it is disabled
- -->
-
- <!--
- FIXME : we only check Mpeg4 encorder cap and other codec doesn't check
- codec cap
- -->
- <VideoEncoderCap name="hevc" enabled="true"
- minBitRate="64000" maxBitRate="100000000"
- minFrameWidth="128" maxFrameWidth="3840"
- minFrameHeight="96" maxFrameHeight="2160"
- minFrameRate="15" maxFrameRate="30" />
-
- <VideoEncoderCap name="h264" enabled="true"
- minBitRate="64000" maxBitRate="100000000"
- minFrameWidth="128" maxFrameWidth="3840"
- minFrameHeight="96" maxFrameHeight="2160"
- minFrameRate="15" maxFrameRate="30" />
-
- <VideoEncoderCap name="h263" enabled="true"
- minBitRate="64000" maxBitRate="1000000"
- minFrameWidth="128" maxFrameWidth="1920"
- minFrameHeight="96" maxFrameHeight="1080"
- minFrameRate="15" maxFrameRate="30" />
-
- <VideoEncoderCap name="m4v" enabled="true"
- minBitRate="64000" maxBitRate="2000000"
- minFrameWidth="128" maxFrameWidth="1920"
- minFrameHeight="96" maxFrameHeight="1080"
- minFrameRate="15" maxFrameRate="30" />
-
- <AudioEncoderCap name="aac" enabled="true"
- minBitRate="758" maxBitRate="288000"
- minSampleRate="8000" maxSampleRate="48000"
- minChannels="1" maxChannels="1" />
-
- <AudioEncoderCap name="heaac" enabled="true"
- minBitRate="8000" maxBitRate="64000"
- minSampleRate="16000" maxSampleRate="48000"
- minChannels="1" maxChannels="1" />
-
- <AudioEncoderCap name="aaceld" enabled="true"
- minBitRate="16000" maxBitRate="192000"
- minSampleRate="16000" maxSampleRate="48000"
- minChannels="1" maxChannels="1" />
-
- <AudioEncoderCap name="amrwb" enabled="true"
- minBitRate="6600" maxBitRate="23050"
- minSampleRate="16000" maxSampleRate="16000"
- minChannels="1" maxChannels="1" />
-
- <AudioEncoderCap name="amrnb" enabled="true"
- minBitRate="5525" maxBitRate="12200"
- minSampleRate="8000" maxSampleRate="8000"
- minChannels="1" maxChannels="1" />
-
- <!--
- FIXME:
- We do not check decoder capabilities at present
- At present, we only check whether windows media is visible
- for TEST applications. For other applications, we do
- not perform any checks at all.
- -->
- <VideoDecoderCap name="wmv" enabled="false"/>
- <AudioDecoderCap name="wma" enabled="false"/>
-</MediaSettings>
diff --git a/media_profiles_ripcurrent.xml b/media_profiles_ripcurrent.xml
deleted file mode 100644
index 6e2977d..0000000
--- a/media_profiles_ripcurrent.xml
+++ /dev/null
@@ -1,1808 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>
-<!-- Copyright (C) 2010 The Android Open Source Project
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
--->
-<!DOCTYPE MediaSettings [
-<!ELEMENT MediaSettings (CamcorderProfiles,
- EncoderOutputFileFormat+,
- VideoEncoderCap+,
- AudioEncoderCap+,
- VideoDecoderCap,
- AudioDecoderCap)>
-<!ELEMENT CamcorderProfiles (EncoderProfile+, ImageEncoding+, ImageDecoding, Camera)>
-<!ELEMENT EncoderProfile (Video, Audio)>
-<!ATTLIST EncoderProfile quality (high|low) #REQUIRED>
-<!ATTLIST EncoderProfile fileFormat (mp4|3gp) #REQUIRED>
-<!ATTLIST EncoderProfile duration (30|60) #REQUIRED>
-<!ELEMENT Video EMPTY>
-<!ATTLIST Video codec (h264|h263|m4v) #REQUIRED>
-<!ATTLIST Video bitRate CDATA #REQUIRED>
-<!ATTLIST Video width CDATA #REQUIRED>
-<!ATTLIST Video height CDATA #REQUIRED>
-<!ATTLIST Video frameRate CDATA #REQUIRED>
-<!ELEMENT Audio EMPTY>
-<!ATTLIST Audio codec (amrnb|amrwb|aac) #REQUIRED>
-<!ATTLIST Audio bitRate CDATA #REQUIRED>
-<!ATTLIST Audio sampleRate CDATA #REQUIRED>
-<!ATTLIST Audio channels (1|2) #REQUIRED>
-<!ELEMENT ImageEncoding EMPTY>
-<!ATTLIST ImageEncoding quality (90|80|70|60|50|40) #REQUIRED>
-<!ELEMENT ImageDecoding EMPTY>
-<!ATTLIST ImageDecoding memCap CDATA #REQUIRED>
-<!ELEMENT Camera EMPTY>
-<!ATTLIST Camera previewFrameRate CDATA #REQUIRED>
-<!ELEMENT EncoderOutputFileFormat EMPTY>
-<!ATTLIST EncoderOutputFileFormat name (mp4|3gp) #REQUIRED>
-<!ELEMENT VideoEncoderCap EMPTY>
-<!ATTLIST VideoEncoderCap name (hevc|h264|h263|m4v|wmv) #REQUIRED>
-<!ATTLIST VideoEncoderCap enabled (true|false) #REQUIRED>
-<!ATTLIST VideoEncoderCap minBitRate CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxBitRate CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap minFrameWidth CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxFrameWidth CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap minFrameHeight CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxFrameHeight CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap minFrameRate CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxFrameRate CDATA #REQUIRED>
-<!ELEMENT AudioEncoderCap EMPTY>
-<!ATTLIST AudioEncoderCap name (amrnb|amrwb|aac|wma) #REQUIRED>
-<!ATTLIST AudioEncoderCap enabled (true|false) #REQUIRED>
-<!ATTLIST AudioEncoderCap minBitRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap maxBitRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap minSampleRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap maxSampleRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap minChannels (1|2) #REQUIRED>
-<!ATTLIST AudioEncoderCap maxChannels (1|2) #REQUIRED>
-<!ELEMENT VideoDecoderCap EMPTY>
-<!ATTLIST VideoDecoderCap name (wmv) #REQUIRED>
-<!ATTLIST VideoDecoderCap enabled (true|false) #REQUIRED>
-<!ELEMENT AudioDecoderCap EMPTY>
-<!ATTLIST AudioDecoderCap name (wma) #REQUIRED>
-<!ATTLIST AudioDecoderCap enabled (true|false) #REQUIRED>
-]>
-<!--
- This file is used to declare the multimedia profiles and capabilities
- on an android-powered device.
--->
-<MediaSettings>
- <!-- Each camcorder profile defines a set of predefined configuration parameters -->
- <CamcorderProfiles cameraId="0">
-
- <EncoderProfile quality="high" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="highspeedlow" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="1920"
- height="1080"
- frameRate="240" />
-
- <!-- audio setting is ignored -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="highspeedhigh" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="1920"
- height="1080"
- frameRate="240" />
-
- <!-- audio setting is ignored -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="highspeed1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="1920"
- height="1080"
- frameRate="240" />
-
- <!-- audio setting is ignored -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="1">
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="2">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="3">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="4">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="5">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="6">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="7">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="8">
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <EncoderOutputFileFormat name="3gp" />
- <EncoderOutputFileFormat name="mp4" />
-
- <!--
- If a codec is not enabled, it is invisible to the applications
- In other words, the applications won't be able to use the codec
- or query the capabilities of the codec at all if it is disabled
- -->
-
- <!--
- FIXME : we only check Mpeg4 encorder cap and other codec doesn't check
- codec cap
- -->
- <VideoEncoderCap name="hevc" enabled="true"
- minBitRate="64000" maxBitRate="100000000"
- minFrameWidth="128" maxFrameWidth="3840"
- minFrameHeight="96" maxFrameHeight="2160"
- minFrameRate="15" maxFrameRate="30" />
-
- <VideoEncoderCap name="h264" enabled="true"
- minBitRate="64000" maxBitRate="100000000"
- minFrameWidth="128" maxFrameWidth="3840"
- minFrameHeight="96" maxFrameHeight="2160"
- minFrameRate="15" maxFrameRate="30" />
-
- <VideoEncoderCap name="h263" enabled="true"
- minBitRate="64000" maxBitRate="1000000"
- minFrameWidth="128" maxFrameWidth="1920"
- minFrameHeight="96" maxFrameHeight="1080"
- minFrameRate="15" maxFrameRate="30" />
-
- <VideoEncoderCap name="m4v" enabled="true"
- minBitRate="64000" maxBitRate="2000000"
- minFrameWidth="128" maxFrameWidth="1920"
- minFrameHeight="96" maxFrameHeight="1080"
- minFrameRate="15" maxFrameRate="30" />
-
- <AudioEncoderCap name="aac" enabled="true"
- minBitRate="758" maxBitRate="288000"
- minSampleRate="8000" maxSampleRate="48000"
- minChannels="1" maxChannels="2" />
-
- <AudioEncoderCap name="heaac" enabled="true"
- minBitRate="8000" maxBitRate="64000"
- minSampleRate="16000" maxSampleRate="48000"
- minChannels="1" maxChannels="2" />
-
- <AudioEncoderCap name="aaceld" enabled="true"
- minBitRate="16000" maxBitRate="192000"
- minSampleRate="16000" maxSampleRate="48000"
- minChannels="1" maxChannels="2" />
-
- <AudioEncoderCap name="amrwb" enabled="true"
- minBitRate="6600" maxBitRate="23050"
- minSampleRate="16000" maxSampleRate="16000"
- minChannels="1" maxChannels="1" />
-
- <AudioEncoderCap name="amrnb" enabled="true"
- minBitRate="5525" maxBitRate="12200"
- minSampleRate="8000" maxSampleRate="8000"
- minChannels="1" maxChannels="1" />
-
- <!--
- FIXME:
- We do not check decoder capabilities at present
- At present, we only check whether windows media is visible
- for TEST applications. For other applications, we do
- not perform any checks at all.
- -->
- <VideoDecoderCap name="wmv" enabled="false"/>
- <AudioDecoderCap name="wma" enabled="false"/>
-</MediaSettings>
diff --git a/media_profiles_shiba.xml b/media_profiles_shiba.xml
deleted file mode 100644
index 1da2154..0000000
--- a/media_profiles_shiba.xml
+++ /dev/null
@@ -1,1440 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>
-<!-- Copyright (C) 2010 The Android Open Source Project
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
--->
-<!DOCTYPE MediaSettings [
-<!ELEMENT MediaSettings (CamcorderProfiles,
- EncoderOutputFileFormat+,
- VideoEncoderCap+,
- AudioEncoderCap+,
- VideoDecoderCap,
- AudioDecoderCap)>
-<!ELEMENT CamcorderProfiles (EncoderProfile+, ImageEncoding+, ImageDecoding, Camera)>
-<!ELEMENT EncoderProfile (Video, Audio)>
-<!ATTLIST EncoderProfile quality (high|low) #REQUIRED>
-<!ATTLIST EncoderProfile fileFormat (mp4|3gp) #REQUIRED>
-<!ATTLIST EncoderProfile duration (30|60) #REQUIRED>
-<!ELEMENT Video EMPTY>
-<!ATTLIST Video codec (h264|h263|m4v) #REQUIRED>
-<!ATTLIST Video bitRate CDATA #REQUIRED>
-<!ATTLIST Video width CDATA #REQUIRED>
-<!ATTLIST Video height CDATA #REQUIRED>
-<!ATTLIST Video frameRate CDATA #REQUIRED>
-<!ELEMENT Audio EMPTY>
-<!ATTLIST Audio codec (amrnb|amrwb|aac) #REQUIRED>
-<!ATTLIST Audio bitRate CDATA #REQUIRED>
-<!ATTLIST Audio sampleRate CDATA #REQUIRED>
-<!ATTLIST Audio channels (1|2) #REQUIRED>
-<!ELEMENT ImageEncoding EMPTY>
-<!ATTLIST ImageEncoding quality (90|80|70|60|50|40) #REQUIRED>
-<!ELEMENT ImageDecoding EMPTY>
-<!ATTLIST ImageDecoding memCap CDATA #REQUIRED>
-<!ELEMENT Camera EMPTY>
-<!ATTLIST Camera previewFrameRate CDATA #REQUIRED>
-<!ELEMENT EncoderOutputFileFormat EMPTY>
-<!ATTLIST EncoderOutputFileFormat name (mp4|3gp) #REQUIRED>
-<!ELEMENT VideoEncoderCap EMPTY>
-<!ATTLIST VideoEncoderCap name (hevc|h264|h263|m4v|wmv) #REQUIRED>
-<!ATTLIST VideoEncoderCap enabled (true|false) #REQUIRED>
-<!ATTLIST VideoEncoderCap minBitRate CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxBitRate CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap minFrameWidth CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxFrameWidth CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap minFrameHeight CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxFrameHeight CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap minFrameRate CDATA #REQUIRED>
-<!ATTLIST VideoEncoderCap maxFrameRate CDATA #REQUIRED>
-<!ELEMENT AudioEncoderCap EMPTY>
-<!ATTLIST AudioEncoderCap name (amrnb|amrwb|aac|wma) #REQUIRED>
-<!ATTLIST AudioEncoderCap enabled (true|false) #REQUIRED>
-<!ATTLIST AudioEncoderCap minBitRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap maxBitRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap minSampleRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap maxSampleRate CDATA #REQUIRED>
-<!ATTLIST AudioEncoderCap minChannels (1|2) #REQUIRED>
-<!ATTLIST AudioEncoderCap maxChannels (1|2) #REQUIRED>
-<!ELEMENT VideoDecoderCap EMPTY>
-<!ATTLIST VideoDecoderCap name (wmv) #REQUIRED>
-<!ATTLIST VideoDecoderCap enabled (true|false) #REQUIRED>
-<!ELEMENT AudioDecoderCap EMPTY>
-<!ATTLIST AudioDecoderCap name (wma) #REQUIRED>
-<!ATTLIST AudioDecoderCap enabled (true|false) #REQUIRED>
-]>
-<!--
- This file is used to declare the multimedia profiles and capabilities
- on an android-powered device.
--->
-<MediaSettings>
- <!-- Each camcorder profile defines a set of predefined configuration parameters -->
- <CamcorderProfiles cameraId="0">
-
- <EncoderProfile quality="high" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="highspeedlow" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="1920"
- height="1080"
- frameRate="240" />
-
- <!-- audio setting is ignored -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="highspeedhigh" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="1920"
- height="1080"
- frameRate="240" />
-
- <!-- audio setting is ignored -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="highspeed1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="1920"
- height="1080"
- frameRate="240" />
-
- <!-- audio setting is ignored -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="1">
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="2">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="3">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="4">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="5">
-
- <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="72000000"
- width="3840"
- height="2160"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="48000000"
- width="3840"
- height="2160"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <CamcorderProfiles cameraId="6">
-
- <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="33000000"
- width="1920"
- height="1080"
- frameRate="60" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="512000"
- width="320"
- height="240"
- frameRate="30" />
-
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
- <Video codec="h264"
- bitRate="128000"
- width="176"
- height="144"
- frameRate="30" />
-
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="22000000"
- width="1920"
- height="1080"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="12000000"
- width="1280"
- height="720"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="6000000"
- width="720"
- height="480"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="1200000"
- width="352"
- height="288"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="aac"
- bitRate="96000"
- sampleRate="48000"
- channels="1" />
- </EncoderProfile>
-
- <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
- <Video codec="h264"
- bitRate="192000"
- width="176"
- height="144"
- frameRate="30" />
-
- <!-- Audio settings are not used for timealpse video recording -->
- <Audio codec="amrnb"
- bitRate="12200"
- sampleRate="8000"
- channels="1" />
- </EncoderProfile>
-
- <ImageEncoding quality="90" />
- <ImageEncoding quality="80" />
- <ImageEncoding quality="70" />
- <ImageDecoding memCap="20000000" />
-
- </CamcorderProfiles>
-
- <EncoderOutputFileFormat name="3gp" />
- <EncoderOutputFileFormat name="mp4" />
-
- <!--
- If a codec is not enabled, it is invisible to the applications
- In other words, the applications won't be able to use the codec
- or query the capabilities of the codec at all if it is disabled
- -->
-
- <!--
- FIXME : we only check Mpeg4 encorder cap and other codec doesn't check
- codec cap
- -->
- <VideoEncoderCap name="hevc" enabled="true"
- minBitRate="64000" maxBitRate="100000000"
- minFrameWidth="128" maxFrameWidth="3840"
- minFrameHeight="96" maxFrameHeight="2160"
- minFrameRate="15" maxFrameRate="30" />
-
- <VideoEncoderCap name="h264" enabled="true"
- minBitRate="64000" maxBitRate="100000000"
- minFrameWidth="128" maxFrameWidth="3840"
- minFrameHeight="96" maxFrameHeight="2160"
- minFrameRate="15" maxFrameRate="30" />
-
- <VideoEncoderCap name="h263" enabled="true"
- minBitRate="64000" maxBitRate="1000000"
- minFrameWidth="128" maxFrameWidth="1920"
- minFrameHeight="96" maxFrameHeight="1080"
- minFrameRate="15" maxFrameRate="30" />
-
- <VideoEncoderCap name="m4v" enabled="true"
- minBitRate="64000" maxBitRate="2000000"
- minFrameWidth="128" maxFrameWidth="1920"
- minFrameHeight="96" maxFrameHeight="1080"
- minFrameRate="15" maxFrameRate="30" />
-
- <AudioEncoderCap name="aac" enabled="true"
- minBitRate="758" maxBitRate="288000"
- minSampleRate="8000" maxSampleRate="48000"
- minChannels="1" maxChannels="1" />
-
- <AudioEncoderCap name="heaac" enabled="true"
- minBitRate="8000" maxBitRate="64000"
- minSampleRate="16000" maxSampleRate="48000"
- minChannels="1" maxChannels="1" />
-
- <AudioEncoderCap name="aaceld" enabled="true"
- minBitRate="16000" maxBitRate="192000"
- minSampleRate="16000" maxSampleRate="48000"
- minChannels="1" maxChannels="1" />
-
- <AudioEncoderCap name="amrwb" enabled="true"
- minBitRate="6600" maxBitRate="23050"
- minSampleRate="16000" maxSampleRate="16000"
- minChannels="1" maxChannels="1" />
-
- <AudioEncoderCap name="amrnb" enabled="true"
- minBitRate="5525" maxBitRate="12200"
- minSampleRate="8000" maxSampleRate="8000"
- minChannels="1" maxChannels="1" />
-
- <!--
- FIXME:
- We do not check decoder capabilities at present
- At present, we only check whether windows media is visible
- for TEST applications. For other applications, we do
- not perform any checks at all.
- -->
- <VideoDecoderCap name="wmv" enabled="false"/>
- <AudioDecoderCap name="wma" enabled="false"/>
-</MediaSettings>
diff --git a/perf/powerhint-husky.json b/perf/powerhint-husky.json
index 63af423..f316245 100644
--- a/perf/powerhint-husky.json
+++ b/perf/powerhint-husky.json
@@ -235,6 +235,7 @@
"Name": "CPUUtilThreshold",
"Path": "/proc/vendor_sched/util_threshold",
"Values": [
+ "2048 1280 1280",
"1280",
"1100"
],
@@ -273,7 +274,7 @@
},
{
"Name": "BGUClampMaxBoost",
- "Path": "/proc/vendor_sched/bg_uclamp_max",
+ "Path": "/proc/vendor_sched/groups/bg/uclamp_max",
"Values": [
"130",
"512"
@@ -283,7 +284,7 @@
},
{
"Name": "Dex2oatUClampMaxBoost",
- "Path": "/proc/vendor_sched/dex2oat_uclamp_max",
+ "Path": "/proc/vendor_sched/groups/dex2oat/uclamp_max",
"Values": [
"-2",
"615"
@@ -293,7 +294,7 @@
},
{
"Name": "CAMUClampBoost",
- "Path": "/proc/vendor_sched/cam_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/cam/uclamp_min",
"Values": [
"765",
"0"
@@ -302,7 +303,7 @@
},
{
"Name": "TAUClampBoost",
- "Path": "/proc/vendor_sched/ta_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/ta/uclamp_min",
"Values": [
"765",
"1"
@@ -311,7 +312,7 @@
},
{
"Name": "FGUClampBoost",
- "Path": "/proc/vendor_sched/fg_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/fg/uclamp_min",
"Values": [
"159",
"0"
@@ -320,7 +321,7 @@
},
{
"Name": "MLUclampBoost",
- "Path": "/proc/vendor_sched/nnapi_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/nnapi/uclamp_min",
"Values": [
"225",
"812"
@@ -339,7 +340,7 @@
},
{
"Name": "CDPreferIdle",
- "Path": "/proc/vendor_sched/cam_prefer_idle",
+ "Path": "/proc/vendor_sched/groups/cam/prefer_idle",
"Values": [
"1",
"0"
@@ -401,7 +402,7 @@
},
{
"Name": "TAPreferHighCap",
- "Path": "/proc/vendor_sched/ta_prefer_high_cap",
+ "Path": "/proc/vendor_sched/groups/ta/prefer_high_cap",
"Values": [
"1",
"0"
@@ -410,7 +411,7 @@
},
{
"Name": "TAPreferIdle",
- "Path": "/proc/vendor_sched/ta_prefer_idle",
+ "Path": "/proc/vendor_sched/groups/ta/prefer_idle",
"Values": [
"1",
"0"
@@ -420,7 +421,7 @@
},
{
"Name": "FGPreferIdle",
- "Path": "/proc/vendor_sched/fg_prefer_idle",
+ "Path": "/proc/vendor_sched/groups/fg/prefer_idle",
"Values": [
"1",
"0"
@@ -430,7 +431,7 @@
},
{
"Name": "CDPreferHighCap",
- "Path": "/proc/vendor_sched/cam_prefer_high_cap",
+ "Path": "/proc/vendor_sched/groups/cam/prefer_high_cap",
"Values": [
"1",
"0"
@@ -736,7 +737,7 @@
},
{
"Name": "Dex2oatGroup",
- "Path": "/proc/vendor_sched/dex2oat_ug",
+ "Path": "/proc/vendor_sched/groups/dex2oat/ug",
"Values": [
"1",
"0"
@@ -1044,6 +1045,113 @@
"Value": "0"
},
{
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "ReducePreferIdle",
+ "Duration": 5000,
+ "Value": "0"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE_GPU",
+ "Node": "GPUDvfsPeriod",
+ "Duration": 1000,
+ "Value": "10"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Type": "DoHint",
+ "Value": "DISPLAY_CHANGE_GPU"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUBigClusterMaxFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUMidClusterMaxFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPULittleClusterMaxFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "TAUClampBoost",
+ "Duration": 5000,
+ "Value": "765"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "FGUClampBoost",
+ "Duration": 5000,
+ "Value": "159"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "MemFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "DsuMinFreq",
+ "Duration": 5000,
+ "Value": "1800000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "BCIMinFreq",
+ "Duration": 5000,
+ "Value": "1401000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUDVFSHeadroom",
+ "Duration": 5000,
+ "Value": "1280"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUTaperedDVFSHeadroomEnable",
+ "Duration": 5000,
+ "Value": "0"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPULittleClusterDownRateLimitUs",
+ "Duration": 5000,
+ "Value": "5000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUMidClusterDownRateLimitUs",
+ "Duration": 5000,
+ "Value": "20000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUBigClusterDownRateLimitUs",
+ "Duration": 5000,
+ "Value": "20000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "TAPreferIdle",
+ "Duration": 5000,
+ "Value": "1"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "FGPreferIdle",
+ "Duration": 5000,
+ "Value": "1"
+ },
+ {
"PowerHint": "CPU_LOAD_RESET",
"Node": "GPUPowerOn",
"Duration": 10,
@@ -1890,6 +1998,12 @@
},
{
"PowerHint": "CAMERA_STREAMING_STANDARD",
+ "Node": "CPUUtilThreshold",
+ "Duration": 0,
+ "Value": "1280"
+ },
+ {
+ "PowerHint": "CAMERA_STREAMING_STANDARD",
"Node": "CDPreferHighCap",
"Duration": 0,
"Value": "1"
@@ -1956,6 +2070,12 @@
},
{
"PowerHint": "CAMERA_STREAMING_LOW",
+ "Node": "CPUUtilThreshold",
+ "Duration": 0,
+ "Value": "1280"
+ },
+ {
+ "PowerHint": "CAMERA_STREAMING_LOW",
"Node": "CDPreferHighCap",
"Duration": 0,
"Value": "1"
@@ -2425,6 +2545,12 @@
},
{
"PowerHint": "GAME",
+ "Node": "CPUUtilThreshold",
+ "Duration": 0,
+ "Value": "1280"
+ },
+ {
+ "PowerHint": "GAME",
"Node": "VIRTUAL-SKIN-CPU-MID",
"Duration": 0,
"Value": "game"
diff --git a/perf/powerhint-ripcurrent.json b/perf/powerhint-ripcurrent.json
index 2747e57..0e95f18 100644
--- a/perf/powerhint-ripcurrent.json
+++ b/perf/powerhint-ripcurrent.json
@@ -221,6 +221,7 @@
"Name": "CPUUtilThreshold",
"Path": "/proc/vendor_sched/util_threshold",
"Values": [
+ "2048 1280 1280",
"1280",
"1100"
],
@@ -259,7 +260,7 @@
},
{
"Name": "BGUClampMaxBoost",
- "Path": "/proc/vendor_sched/bg_uclamp_max",
+ "Path": "/proc/vendor_sched/groups/bg/uclamp_max",
"Values": [
"130",
"512"
@@ -269,7 +270,7 @@
},
{
"Name": "Dex2oatUClampMaxBoost",
- "Path": "/proc/vendor_sched/dex2oat_uclamp_max",
+ "Path": "/proc/vendor_sched/groups/dex2oat/uclamp_max",
"Values": [
"-2",
"615"
@@ -279,7 +280,7 @@
},
{
"Name": "CAMUClampBoost",
- "Path": "/proc/vendor_sched/cam_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/cam/uclamp_min",
"Values": [
"765",
"0"
@@ -288,7 +289,7 @@
},
{
"Name": "TAUClampBoost",
- "Path": "/proc/vendor_sched/ta_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/ta/uclamp_min",
"Values": [
"765",
"1"
@@ -297,7 +298,7 @@
},
{
"Name": "FGUClampBoost",
- "Path": "/proc/vendor_sched/fg_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/fg/uclamp_min",
"Values": [
"159",
"0"
@@ -306,7 +307,7 @@
},
{
"Name": "MLUclampBoost",
- "Path": "/proc/vendor_sched/nnapi_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/nnapi/uclamp_min",
"Values": [
"225",
"812"
@@ -325,7 +326,7 @@
},
{
"Name": "CDPreferIdle",
- "Path": "/proc/vendor_sched/cam_prefer_idle",
+ "Path": "/proc/vendor_sched/groups/cam/prefer_idle",
"Values": [
"1",
"0"
@@ -387,7 +388,7 @@
},
{
"Name": "TAPreferHighCap",
- "Path": "/proc/vendor_sched/ta_prefer_high_cap",
+ "Path": "/proc/vendor_sched/groups/ta/prefer_high_cap",
"Values": [
"1",
"0"
@@ -396,7 +397,7 @@
},
{
"Name": "TAPreferIdle",
- "Path": "/proc/vendor_sched/ta_prefer_idle",
+ "Path": "/proc/vendor_sched/groups/ta/prefer_idle",
"Values": [
"1",
"0"
@@ -406,7 +407,7 @@
},
{
"Name": "FGPreferIdle",
- "Path": "/proc/vendor_sched/fg_prefer_idle",
+ "Path": "/proc/vendor_sched/groups/fg/prefer_idle",
"Values": [
"1",
"0"
@@ -416,7 +417,7 @@
},
{
"Name": "CDPreferHighCap",
- "Path": "/proc/vendor_sched/cam_prefer_high_cap",
+ "Path": "/proc/vendor_sched/groups/cam/prefer_high_cap",
"Values": [
"1",
"0"
@@ -782,7 +783,7 @@
},
{
"Name": "Dex2oatGroup",
- "Path": "/proc/vendor_sched/dex2oat_ug",
+ "Path": "/proc/vendor_sched/groups/dex2oat/ug",
"Values": [
"1",
"0"
@@ -1066,6 +1067,113 @@
"Value": "0"
},
{
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "ReducePreferIdle",
+ "Duration": 5000,
+ "Value": "0"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE_GPU",
+ "Node": "GPUDvfsPeriod",
+ "Duration": 1000,
+ "Value": "10"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Type": "DoHint",
+ "Value": "DISPLAY_CHANGE_GPU"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUBigClusterMaxFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUMidClusterMaxFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPULittleClusterMaxFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "TAUClampBoost",
+ "Duration": 5000,
+ "Value": "765"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "FGUClampBoost",
+ "Duration": 5000,
+ "Value": "159"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "MemFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "DsuMinFreq",
+ "Duration": 5000,
+ "Value": "1548000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "BCIMinFreq",
+ "Duration": 5000,
+ "Value": "1401000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUDVFSHeadroom",
+ "Duration": 5000,
+ "Value": "1280"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUTaperedDVFSHeadroomEnable",
+ "Duration": 5000,
+ "Value": "0"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPULittleClusterDownRateLimitUs",
+ "Duration": 5000,
+ "Value": "5000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUMidClusterDownRateLimitUs",
+ "Duration": 5000,
+ "Value": "20000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUBigClusterDownRateLimitUs",
+ "Duration": 5000,
+ "Value": "20000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "TAPreferIdle",
+ "Duration": 5000,
+ "Value": "1"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "FGPreferIdle",
+ "Duration": 5000,
+ "Value": "1"
+ },
+ {
"PowerHint": "CPU_LOAD_RESET",
"Node": "GPUPowerOn",
"Duration": 10,
@@ -1727,6 +1835,12 @@
},
{
"PowerHint": "CAMERA_STREAMING_STANDARD",
+ "Node": "CPUUtilThreshold",
+ "Duration": 0,
+ "Value": "1280"
+ },
+ {
+ "PowerHint": "CAMERA_STREAMING_STANDARD",
"Node": "CDPreferHighCap",
"Duration": 0,
"Value": "1"
@@ -1781,6 +1895,12 @@
},
{
"PowerHint": "CAMERA_STREAMING_LOW",
+ "Node": "CPUUtilThreshold",
+ "Duration": 0,
+ "Value": "1280"
+ },
+ {
+ "PowerHint": "CAMERA_STREAMING_LOW",
"Node": "CDPreferHighCap",
"Duration": 0,
"Value": "1"
@@ -2238,6 +2358,12 @@
},
{
"PowerHint": "GAME",
+ "Node": "CPUUtilThreshold",
+ "Duration": 0,
+ "Value": "1280"
+ },
+ {
+ "PowerHint": "GAME",
"Node": "NPITaskPacking",
"Duration": 0,
"Value": "1"
diff --git a/perf/powerhint-shiba.json b/perf/powerhint-shiba.json
index 87b42ce..fa68d84 100644
--- a/perf/powerhint-shiba.json
+++ b/perf/powerhint-shiba.json
@@ -235,6 +235,7 @@
"Name": "CPUUtilThreshold",
"Path": "/proc/vendor_sched/util_threshold",
"Values": [
+ "2048 1280 1280",
"1280",
"1100"
],
@@ -273,7 +274,7 @@
},
{
"Name": "BGUClampMaxBoost",
- "Path": "/proc/vendor_sched/bg_uclamp_max",
+ "Path": "/proc/vendor_sched/groups/bg/uclamp_max",
"Values": [
"130",
"512"
@@ -283,7 +284,7 @@
},
{
"Name": "Dex2oatUClampMaxBoost",
- "Path": "/proc/vendor_sched/dex2oat_uclamp_max",
+ "Path": "/proc/vendor_sched/groups/dex2oat/uclamp_max",
"Values": [
"-2",
"615"
@@ -293,7 +294,7 @@
},
{
"Name": "CAMUClampBoost",
- "Path": "/proc/vendor_sched/cam_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/cam/uclamp_min",
"Values": [
"765",
"0"
@@ -302,7 +303,7 @@
},
{
"Name": "TAUClampBoost",
- "Path": "/proc/vendor_sched/ta_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/ta/uclamp_min",
"Values": [
"765",
"1"
@@ -311,7 +312,7 @@
},
{
"Name": "FGUClampBoost",
- "Path": "/proc/vendor_sched/fg_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/fg/uclamp_min",
"Values": [
"159",
"0"
@@ -320,7 +321,7 @@
},
{
"Name": "MLUclampBoost",
- "Path": "/proc/vendor_sched/nnapi_uclamp_min",
+ "Path": "/proc/vendor_sched/groups/nnapi/uclamp_min",
"Values": [
"225",
"812"
@@ -339,7 +340,7 @@
},
{
"Name": "CDPreferIdle",
- "Path": "/proc/vendor_sched/cam_prefer_idle",
+ "Path": "/proc/vendor_sched/groups/cam/prefer_idle",
"Values": [
"1",
"0"
@@ -401,7 +402,7 @@
},
{
"Name": "TAPreferHighCap",
- "Path": "/proc/vendor_sched/ta_prefer_high_cap",
+ "Path": "/proc/vendor_sched/groups/ta/prefer_high_cap",
"Values": [
"1",
"0"
@@ -410,7 +411,7 @@
},
{
"Name": "TAPreferIdle",
- "Path": "/proc/vendor_sched/ta_prefer_idle",
+ "Path": "/proc/vendor_sched/groups/ta/prefer_idle",
"Values": [
"1",
"0"
@@ -420,7 +421,7 @@
},
{
"Name": "FGPreferIdle",
- "Path": "/proc/vendor_sched/fg_prefer_idle",
+ "Path": "/proc/vendor_sched/groups/fg/prefer_idle",
"Values": [
"1",
"0"
@@ -430,7 +431,7 @@
},
{
"Name": "CDPreferHighCap",
- "Path": "/proc/vendor_sched/cam_prefer_high_cap",
+ "Path": "/proc/vendor_sched/groups/cam/prefer_high_cap",
"Values": [
"1",
"0"
@@ -736,7 +737,7 @@
},
{
"Name": "Dex2oatGroup",
- "Path": "/proc/vendor_sched/dex2oat_ug",
+ "Path": "/proc/vendor_sched/groups/dex2oat/ug",
"Values": [
"1",
"0"
@@ -1044,6 +1045,113 @@
"Value": "0"
},
{
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "ReducePreferIdle",
+ "Duration": 5000,
+ "Value": "0"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE_GPU",
+ "Node": "GPUDvfsPeriod",
+ "Duration": 1000,
+ "Value": "10"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Type": "DoHint",
+ "Value": "DISPLAY_CHANGE_GPU"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUBigClusterMaxFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUMidClusterMaxFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPULittleClusterMaxFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "TAUClampBoost",
+ "Duration": 5000,
+ "Value": "765"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "FGUClampBoost",
+ "Duration": 5000,
+ "Value": "159"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "MemFreq",
+ "Duration": 5000,
+ "Value": "9999999"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "DsuMinFreq",
+ "Duration": 5000,
+ "Value": "1800000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "BCIMinFreq",
+ "Duration": 5000,
+ "Value": "1401000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUDVFSHeadroom",
+ "Duration": 5000,
+ "Value": "1280"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUTaperedDVFSHeadroomEnable",
+ "Duration": 5000,
+ "Value": "0"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPULittleClusterDownRateLimitUs",
+ "Duration": 5000,
+ "Value": "5000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUMidClusterDownRateLimitUs",
+ "Duration": 5000,
+ "Value": "20000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "CPUBigClusterDownRateLimitUs",
+ "Duration": 5000,
+ "Value": "20000"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "TAPreferIdle",
+ "Duration": 5000,
+ "Value": "1"
+ },
+ {
+ "PowerHint": "DISPLAY_CHANGE",
+ "Node": "FGPreferIdle",
+ "Duration": 5000,
+ "Value": "1"
+ },
+ {
"PowerHint": "CPU_LOAD_RESET",
"Node": "GPUPowerOn",
"Duration": 10,
@@ -1792,6 +1900,12 @@
"Duration": 0,
"Value": "cam1"
},
+ {
+ "PowerHint": "CAMERA_STREAMING_STANDARD",
+ "Node": "CPUUtilThreshold",
+ "Duration": 0,
+ "Value": "1280"
+ },
{
"PowerHint": "CAMERA_STREAMING_STANDARD",
"Node": "CDPreferHighCap",
@@ -1936,6 +2050,12 @@
"Duration": 0,
"Value": "cam1"
},
+ {
+ "PowerHint": "CAMERA_STREAMING_LOW",
+ "Node": "CPUUtilThreshold",
+ "Duration": 0,
+ "Value": "1280"
+ },
{
"PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
"Node": "CDPreferHighCap",
@@ -2371,6 +2491,12 @@
},
{
"PowerHint": "GAME",
+ "Node": "CPUUtilThreshold",
+ "Duration": 0,
+ "Value": "1280"
+ },
+ {
+ "PowerHint": "GAME",
"Node": "VIRTUAL-SKIN-CPU-MID",
"Duration": 0,
"Value": "game"
diff --git a/ripcurrent/BoardConfig.mk b/ripcurrent/BoardConfig.mk
index a84d4b0..d25edd1 100644
--- a/ripcurrent/BoardConfig.mk
+++ b/ripcurrent/BoardConfig.mk
@@ -27,6 +27,14 @@
BOARD_USES_GENERIC_AUDIO := true
USES_DEVICE_GOOGLE_SHUSKY := true
+ifneq (,$(filter AP1%,$(RELEASE_PLATFORM_VERSION)))
+RELEASE_GOOGLE_PRODUCT_BOOTLOADER_DIR := bootloader/24Q1
+else ifneq (,$(filter AP2%,$(RELEASE_PLATFORM_VERSION)))
+RELEASE_GOOGLE_PRODUCT_BOOTLOADER_DIR := bootloader/24Q2
+else
+RELEASE_GOOGLE_PRODUCT_BOOTLOADER_DIR := bootloader/trunk
+endif
+
include device/google/shusky/device-shusky-common.mk
include device/google/zuma/BoardConfig-common.mk
diff --git a/rro_overlays/WifiOverlay/res/values/config.xml b/rro_overlays/WifiOverlay/res/values/config.xml
index 3fdade0..6b5ccd8 100644
--- a/rro_overlays/WifiOverlay/res/values/config.xml
+++ b/rro_overlays/WifiOverlay/res/values/config.xml
@@ -136,7 +136,7 @@
<bool translatable="false" name="config_wifiUseHalApiToDisableFwRoaming">true</bool>
<!-- Indicate the driver doesn't support NL80211 Reg changed event -->
- <bool translatable="false" name="config_wifiDriverSupportedNl80211RegChangedEvent">false</bool>
+ <bool translatable="false" name="config_wifiDriverSupportedNl80211RegChangedEvent">true</bool>
<!-- boolean indicating whether or not to disable shutdown idle instance timer in the bridged mode when connected to a power source -->
<bool translatable="false" name ="config_wifiFrameworkSoftApDisableBridgedModeShutdownIdleInstanceWhenCharging">true</bool>
@@ -171,4 +171,7 @@
<!-- boolean indicating whether the caller thread needs to wait for destroyed listeners -->
<bool translatable="false" name ="config_wifiWaitForDestroyedListeners">true</bool>
+
+ <!-- Enable aggregation of Wifi link layer radio stats from all radios -->
+ <bool translatable="false" name="config_wifiLinkLayerAllRadiosStatsAggregationEnabled">true</bool>
</resources>
diff --git a/self-extractors_husky/google_devices/staging/Android.mk b/self-extractors_husky/google_devices/staging/Android.mk
index 640e451..a3a6f13 100644
--- a/self-extractors_husky/google_devices/staging/Android.mk
+++ b/self-extractors_husky/google_devices/staging/Android.mk
@@ -48,7 +48,7 @@
LOCAL_MODULE_OWNER := samsung
LOCAL_MODULE_CLASS := APPS
LOCAL_SRC_FILES := $(LOCAL_MODULE).apk
-LOCAL_CERTIFICATE := platform
+LOCAL_CERTIFICATE := PRESIGNED
LOCAL_LICENSE_KINDS := SPDX-license-identifier-Apache-2.0
LOCAL_LICENSE_CONDITIONS := notice
LOCAL_NOTICE_FILE := $(LOCAL_PATH)/../COPYRIGHT $(LOCAL_PATH)/../LICENSE
diff --git a/self-extractors_shiba/google_devices/staging/Android.mk b/self-extractors_shiba/google_devices/staging/Android.mk
index 27496ec..124f68a 100644
--- a/self-extractors_shiba/google_devices/staging/Android.mk
+++ b/self-extractors_shiba/google_devices/staging/Android.mk
@@ -48,7 +48,7 @@
LOCAL_MODULE_OWNER := samsung
LOCAL_MODULE_CLASS := APPS
LOCAL_SRC_FILES := $(LOCAL_MODULE).apk
-LOCAL_CERTIFICATE := platform
+LOCAL_CERTIFICATE := PRESIGNED
LOCAL_LICENSE_KINDS := SPDX-license-identifier-Apache-2.0
LOCAL_LICENSE_CONDITIONS := notice
LOCAL_NOTICE_FILE := $(LOCAL_PATH)/../COPYRIGHT $(LOCAL_PATH)/../LICENSE
diff --git a/shiba/BoardConfig.mk b/shiba/BoardConfig.mk
index 1fe7b27..4ae6c8b 100644
--- a/shiba/BoardConfig.mk
+++ b/shiba/BoardConfig.mk
@@ -24,7 +24,23 @@
TARGET_BOARD_INFO_FILE := device/google/shusky/board-info.txt
TARGET_BOOTLOADER_BOARD_NAME := shiba
-TARGET_SCREEN_DENSITY := 420
+
+RELEASE_GOOGLE_PRODUCT_RADIO_DIR := $(RELEASE_GOOGLE_SHIBA_RADIO_DIR)
+RELEASE_GOOGLE_PRODUCT_RADIOCFG_DIR := $(RELEASE_GOOGLE_HUSKY_RADIOCFG_DIR)
+ifneq (,$(filter AP1%,$(RELEASE_PLATFORM_VERSION)))
+RELEASE_GOOGLE_PRODUCT_BOOTLOADER_DIR := bootloader/24Q1
+else ifneq (,$(filter AP2%,$(RELEASE_PLATFORM_VERSION)))
+RELEASE_GOOGLE_PRODUCT_BOOTLOADER_DIR := bootloader/24Q2
+else
+RELEASE_GOOGLE_PRODUCT_BOOTLOADER_DIR := bootloader/trunk
+endif
+
+ifdef PHONE_CAR_BOARD_PRODUCT
+ include vendor/auto/embedded/products/$(PHONE_CAR_BOARD_PRODUCT)/BoardConfig.mk
+else
+ TARGET_SCREEN_DENSITY := 420
+endif
+
BOARD_USES_GENERIC_AUDIO := true
USES_DEVICE_GOOGLE_SHUSKY := true
BOARD_KERNEL_CMDLINE += swiotlb=noforce
diff --git a/shiba/overlay/frameworks/base/core/res/res/values/config.xml b/shiba/overlay/frameworks/base/core/res/res/values/config.xml
index 33399cb..a83fa35 100644
--- a/shiba/overlay/frameworks/base/core/res/res/values/config.xml
+++ b/shiba/overlay/frameworks/base/core/res/res/values/config.xml
@@ -45,9 +45,6 @@
<!-- 140 nits: (140-2)/(1000-2)*(0.71-0.0)+0.0 = 0.098176353 -->
<item name="config_screenBrightnessSettingDefaultFloat" format="float" type="dimen">0.098176353</item>
- <!-- Allow normal brightness controller feature. -->
- <bool name="config_allowNormalBrightnessControllerFeature">true</bool>
-
<!-- Array of light sensor LUX values to define our levels for auto backlight brightness support.
The N entries of this array define N 1 zones as follows:
Zone 0: 0 <= LUX < array[0]
diff --git a/husky/overlay/frameworks/base/packages/SystemUI/res/values/flags.xml b/shiba/overlay/frameworks/base/packages/SystemUI/res-keyguard/values/dimens.xml
similarity index 80%
rename from husky/overlay/frameworks/base/packages/SystemUI/res/values/flags.xml
rename to shiba/overlay/frameworks/base/packages/SystemUI/res-keyguard/values/dimens.xml
index 3d4a679..d45b484 100644
--- a/husky/overlay/frameworks/base/packages/SystemUI/res/values/flags.xml
+++ b/shiba/overlay/frameworks/base/packages/SystemUI/res-keyguard/values/dimens.xml
@@ -16,7 +16,6 @@
*/
-->
<resources>
- <!-- Whether face auth will immediately stop when the display state is OFF -->
- <bool name="flag_stop_face_auth_on_display_off">true</bool>
-</resources>
-
+ <!-- Weather clock smartspace positioning to apply for the weather clock on shiba -->
+ <dimen name="weather_clock_smartspace_translateY">10dp</dimen>
+</resources>
\ No newline at end of file
diff --git a/shiba/overlay/packages/apps/Nfc/res/values/config.xml b/shiba/overlay/packages/apps/Nfc/res/values/config.xml
index 5bdeca6..3f325b8 100644
--- a/shiba/overlay/packages/apps/Nfc/res/values/config.xml
+++ b/shiba/overlay/packages/apps/Nfc/res/values/config.xml
@@ -20,6 +20,7 @@
<item>GKWS6</item>
<item>GZPF0</item>
<item>GPJ41</item>
+ <item>G9BQD</item>
</string-array>
<bool name="tag_intent_app_pref_supported">true</bool>
<!-- NFC Antenna Location API -->
diff --git a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_g9bqd_cn.png b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_g9bqd_cn.png
index 2ca5fa6..dc9d8b5 100644
--- a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_g9bqd_cn.png
+++ b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_g9bqd_cn.png
Binary files differ
diff --git a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_g9bqd_vn.png b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_g9bqd_vn.png
index 1fd1d71..8790e49 100644
--- a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_g9bqd_vn.png
+++ b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_g9bqd_vn.png
Binary files differ
diff --git a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gkws6_cn.png b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gkws6_cn.png
index da0634d..8c5e0c2 100644
--- a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gkws6_cn.png
+++ b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gkws6_cn.png
Binary files differ
diff --git a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gkws6_vn.png b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gkws6_vn.png
index c0d167d..2e4b5ee 100644
--- a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gkws6_vn.png
+++ b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gkws6_vn.png
Binary files differ
diff --git a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gpj41_cn.png b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gpj41_cn.png
index 03a4819..b849bcd 100644
--- a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gpj41_cn.png
+++ b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gpj41_cn.png
Binary files differ
diff --git a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gpj41_vn.png b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gpj41_vn.png
index 86da4b8..ace3619 100644
--- a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gpj41_vn.png
+++ b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gpj41_vn.png
Binary files differ
diff --git a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gzpf0_cn.png b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gzpf0_cn.png
index 59fc3b3..dbd34d0 100644
--- a/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gzpf0_cn.png
+++ b/shiba/overlay_packages/SettingsShibaOverlay/res/drawable/regulatory_info_gzpf0_cn.png
Binary files differ
diff --git a/shiba/rro_overlays/NfcOverlay/Android.bp b/shiba/rro_overlays/NfcOverlay/Android.bp
new file mode 100644
index 0000000..065e971
--- /dev/null
+++ b/shiba/rro_overlays/NfcOverlay/Android.bp
@@ -0,0 +1,9 @@
+package {
+ default_applicable_licenses: ["device_google_shusky_license"],
+}
+
+runtime_resource_overlay {
+ name: "NfcOverlayShiba",
+ sdk_version: "current",
+ product_specific: true
+}
diff --git a/shiba/rro_overlays/NfcOverlay/AndroidManifest.xml b/shiba/rro_overlays/NfcOverlay/AndroidManifest.xml
new file mode 100644
index 0000000..5241aa4
--- /dev/null
+++ b/shiba/rro_overlays/NfcOverlay/AndroidManifest.xml
@@ -0,0 +1,27 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- Copyright (C) 2023 The Android Open Source Project
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+-->
+<!-- Pixel specific nfc overlays -->
+<manifest xmlns:android="http://schemas.android.com/apk/res/android"
+ package="com.android.nfc.overlay"
+ android:versionCode="1"
+ android:versionName="1.0">
+ <application android:hasCode="false" />
+ <overlay
+ android:targetPackage="com.android.nfc"
+ android:targetName="NfcCustomization"
+ android:isStatic="true"
+ android:priority="0"/>
+</manifest>
diff --git a/shiba/rro_overlays/NfcOverlay/OWNERS b/shiba/rro_overlays/NfcOverlay/OWNERS
new file mode 100644
index 0000000..35e9713
--- /dev/null
+++ b/shiba/rro_overlays/NfcOverlay/OWNERS
@@ -0,0 +1,2 @@
+# Bug component: 48448
+include platform/packages/apps/Nfc:/OWNERS
diff --git a/shiba/rro_overlays/NfcOverlay/res/values/config.xml b/shiba/rro_overlays/NfcOverlay/res/values/config.xml
new file mode 100644
index 0000000..5bdeca6
--- /dev/null
+++ b/shiba/rro_overlays/NfcOverlay/res/values/config.xml
@@ -0,0 +1,35 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- Copyright (C) 2022 The Android Open Source Project
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+-->
+<resources>
+ <bool name="nfcc_always_on_allowed">false</bool>
+ <bool name="polling_disable_allowed">true</bool>
+ <string-array name="config_skuSupportsSecureNfc" translatable="false">
+ <item>GKWS6</item>
+ <item>GZPF0</item>
+ <item>GPJ41</item>
+ </string-array>
+ <bool name="tag_intent_app_pref_supported">true</bool>
+ <!-- NFC Antenna Location API -->
+ <integer name="device_width">68</integer>
+ <integer name="device_height">146</integer>
+ <bool name="device_foldable">false</bool>
+ <integer-array name="antenna_x">
+ <item>34</item>
+ </integer-array>
+ <integer-array name="antenna_y">
+ <item>97</item>
+ </integer-array>
+</resources>
diff --git a/thermal/Android.bp b/thermal/Android.bp
new file mode 100644
index 0000000..fed2086
--- /dev/null
+++ b/thermal/Android.bp
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2023 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+package {
+ default_applicable_licenses: ["Android-Apache-2.0"],
+}
+
+cc_library {
+ name: "thermal-config-cpp",
+ proto: {
+ type: "lite",
+ export_proto_headers: true,
+ include_dirs: [
+ "external/protobuf/src",
+ "device/google/gs-common/thermal/thermal_hal/thermal_config_schemas"
+ ],
+ }
+}
+
+cc_test_host {
+ name: "shusky-thermal-config-test",
+ srcs: [
+ "thermal_config_test.cpp",
+ ],
+ static_libs: [
+ "libbase",
+ "libgmock",
+ "liblog",
+ "libjsoncpp",
+ "libjsonpbverify",
+ "libjsonpbparse",
+ "thermal_HAL_info_config_proto",
+ ],
+ shared_libs: [
+ "libprotobuf-cpp-full",
+ ],
+ cflags: [
+ "-Wall",
+ "-Werror",
+ "-Wno-unused-parameter",
+ ],
+ data: [
+ "*.json"
+ ],
+ test_suites: [
+ "general-tests",
+ ],
+}
\ No newline at end of file
diff --git a/thermal/thermal_config_test.cpp b/thermal/thermal_config_test.cpp
new file mode 100644
index 0000000..7b01306
--- /dev/null
+++ b/thermal/thermal_config_test.cpp
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2023 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <android-base/file.h>
+#include <gtest/gtest.h>
+#include <jsonpb/json_schema_test.h>
+
+#include "thermal_info_config_test.h"
+
+using namespace ::android::jsonpb;
+using ::android::base::GetExecutableDirectory;
+
+namespace devices {
+namespace shusky {
+
+template <typename T>
+JsonSchemaTestConfigFactory MakeTestParam(const std::string &path) {
+ return android::jsonpb::MakeTestParam<T>(GetExecutableDirectory() + path);
+}
+
+// Make test suite for thermal info config schema.
+INSTANTIATE_TEST_SUITE_P(
+ ThermalSuite, ThermalInfoConfigTest,
+ ::testing::Values(
+ MakeTestParam<ThermalConfig>("/thermal_info_config_husky.json"),
+ MakeTestParam<ThermalConfig>("/thermal_info_config_shiba.json"),
+ MakeTestParam<ThermalConfig>("/thermal_info_config_charge_husky.json"),
+ MakeTestParam<ThermalConfig>("/thermal_info_config_charge_shiba.json"),
+ MakeTestParam<ThermalConfig>("/thermal_info_config_ripcurrent.json"),
+ MakeTestParam<ThermalConfig>(
+ "/thermal_info_config_charge_ripcurrent.json")));
+
+// Ignores a formatting check (b/c 0.0 != 0 textually)
+GTEST_ALLOW_UNINSTANTIATED_PARAMETERIZED_TEST(JsonSchemaTest);
+
+int main(int argc, char **argv) {
+ ::testing::InitGoogleTest(&argc, argv);
+ return RUN_ALL_TESTS();
+}
+
+} // namespace shusky
+} // namespace devices
diff --git a/thermal/thermal_info_config_charge_husky.json b/thermal/thermal_info_config_charge_husky.json
index 626c2b4..3751093 100644
--- a/thermal/thermal_info_config_charge_husky.json
+++ b/thermal/thermal_info_config_charge_husky.json
@@ -3,7 +3,7 @@
{
"Name":"north_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 32.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 32.1, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/north_therm/tz_temp",
"Multiplier":0.001,
@@ -13,7 +13,7 @@
{
"Name":"cam_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 33.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 33.7, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/cam_therm/tz_temp",
"Multiplier":0.001,
@@ -23,7 +23,7 @@
{
"Name":"soc_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 47.2, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 47.2, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/soc_therm/tz_temp",
"Multiplier":0.001,
@@ -33,7 +33,7 @@
{
"Name":"charge_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 48.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 48.4, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/charge_therm/tz_temp",
"Multiplier":0.001,
@@ -43,7 +43,7 @@
{
"Name":"disp_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 31.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 31.7, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/disp_therm/tz_temp",
"Multiplier":0.001,
@@ -53,13 +53,13 @@
{
"Name":"battery",
"Type":"BATTERY",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 60.0],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", 60.0],
"Multiplier":0.001
},
{
"Name":"neutral_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 44.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 44.1, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/neutral_therm/tz_temp",
"Multiplier":0.001,
@@ -69,7 +69,7 @@
{
"Name":"quiet_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 34.6, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 34.6, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/quiet_therm/tz_temp",
"Multiplier":0.001,
@@ -79,7 +79,7 @@
{
"Name":"usb_pwr_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 35.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 35.0, "NaN", "NaN", "NaN", "NaN", "NaN"],
"TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/tz_temp",
"Multiplier":0.001,
"PollingDelay":60000,
@@ -163,21 +163,21 @@
"Formula":"WEIGHTED_AVG",
"Combination":["VIRTUAL-SKIN-CHARGE", "IS_WLC"],
"Coefficient":[1.0, -1000000],
- "HotThreshold":["NAN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
+ "HotThreshold":["NaN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
"HotHysteresis":[0.0, 1.9, 3.9, 2.9, 3.9, 1.9, 1.9],
"Multiplier":0.001,
"PollingDelay":60000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 119, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 119, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 25, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1302, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 2527, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 6219, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 6, "NAN", "NAN", "NAN", "NAN"],
+ "K_Po":["NaN", "NaN", 119, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 119, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 25, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1302, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 2527, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 6219, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 6, "NaN", "NaN", "NaN", "NaN"],
"I_Default":1302
},
"ExcludedPowerInfo": [
@@ -206,21 +206,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN-CHARGE"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
+ "HotThreshold":["NaN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
"HotHysteresis":[0.0, 1.9, 1.9, 3.9, 1.9, 1.9, 1.9],
"Multiplier":0.001,
"PollingDelay":60000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 213, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 213, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 27, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1383, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 2383, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 8022, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 8, "NAN", "NAN", "NAN", "NAN"],
+ "K_Po":["NaN", "NaN", 213, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 213, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 27, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1383, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 2383, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 8022, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 8, "NaN", "NaN", "NaN", "NaN"],
"I_Default":1383
},
"ExcludedPowerInfo": [
@@ -285,7 +285,7 @@
"TriggerSensor": "usb_pwr_therm",
"Combination":["usb_pwr_therm", "USB-MINUS-NEUTRAL", "USB-MINUS-QUIET", "VIRTUAL-USB-THROTTLING-SUB0"],
"Coefficient":[46000, 0, 0, 1],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "4.0", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "4.0", "NaN", "NaN"],
"BindedCdevInfo": [
{
"CdevRequest": "usbc-port",
diff --git a/thermal/thermal_info_config_charge_ripcurrent.json b/thermal/thermal_info_config_charge_ripcurrent.json
index 4e7eecb..2e80991 100644
--- a/thermal/thermal_info_config_charge_ripcurrent.json
+++ b/thermal/thermal_info_config_charge_ripcurrent.json
@@ -4,15 +4,15 @@
"Name":"battery",
"Type":"BATTERY",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
"60.0"
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":0.001
}
]
diff --git a/thermal/thermal_info_config_charge_shiba.json b/thermal/thermal_info_config_charge_shiba.json
index a7d5436..8e3ffbd 100644
--- a/thermal/thermal_info_config_charge_shiba.json
+++ b/thermal/thermal_info_config_charge_shiba.json
@@ -3,7 +3,7 @@
{
"Name":"north_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 38.8, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 38.8, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/north_therm/tz_temp",
"Multiplier":0.001,
@@ -13,7 +13,7 @@
{
"Name":"cam_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 31.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 31.0, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/cam_therm/tz_temp",
"Multiplier":0.001,
@@ -23,7 +23,7 @@
{
"Name":"soc_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 41.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 41.4, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/soc_therm/tz_temp",
"Multiplier":0.001,
@@ -33,7 +33,7 @@
{
"Name":"charge_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 42.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 42.4, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/charge_therm/tz_temp",
"Multiplier":0.001,
@@ -43,7 +43,7 @@
{
"Name":"disp_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 31.2, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 31.2, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/disp_therm/tz_temp",
"Multiplier":0.001,
@@ -53,13 +53,13 @@
{
"Name":"battery",
"Type":"BATTERY",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 60.0],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", 60.0],
"Multiplier":0.001
},
{
"Name":"neutral_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 41.5, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 41.5, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/neutral_therm/tz_temp",
"Multiplier":0.001,
@@ -69,7 +69,7 @@
{
"Name":"quiet_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 35.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 35.1, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/quiet_therm/tz_temp",
"Multiplier":0.001,
@@ -79,7 +79,7 @@
{
"Name":"usb_pwr_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 35.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 35.0, "NaN", "NaN", "NaN", "NaN", "NaN"],
"TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/tz_temp",
"Multiplier":0.001,
"PollingDelay":60000,
@@ -196,21 +196,21 @@
"Formula":"WEIGHTED_AVG",
"Combination":["VIRTUAL-SKIN-CHARGE", "IS_WLC"],
"Coefficient":[1.0, -1000000],
- "HotThreshold":["NAN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
+ "HotThreshold":["NaN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
"HotHysteresis":[0.0, 1.9, 3.9, 2.9, 3.9, 1.9, 1.9],
"Multiplier":0.001,
"PollingDelay":60000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 101, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 101, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 21, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1099, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 2404, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 5519, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 6, "NAN", "NAN", "NAN", "NAN"],
+ "K_Po":["NaN", "NaN", 101, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 101, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 21, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1099, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 2404, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 5519, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 6, "NaN", "NaN", "NaN", "NaN"],
"I_Default":1099
},
"ExcludedPowerInfo": [
@@ -239,21 +239,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN-CHARGE"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
+ "HotThreshold":["NaN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
"HotHysteresis":[0.0, 1.9, 1.9, 3.9, 1.9, 1.9, 1.9],
"Multiplier":0.001,
"PollingDelay":60000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 164, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 164, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 21, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1066, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 2066, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 6412, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 8, "NAN", "NAN", "NAN", "NAN"],
+ "K_Po":["NaN", "NaN", 164, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 164, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 21, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1066, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 2066, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 6412, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 8, "NaN", "NaN", "NaN", "NaN"],
"I_Default":1066
},
"ExcludedPowerInfo": [
@@ -318,7 +318,7 @@
"TriggerSensor": "usb_pwr_therm",
"Combination":["usb_pwr_therm", "USB-MINUS-NEUTRAL", "USB-MINUS-QUIET", "VIRTUAL-USB-THROTTLING-SUB0"],
"Coefficient":[46000, 0, 0, 1],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "4.0", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "4.0", "NaN", "NaN"],
"BindedCdevInfo": [
{
"CdevRequest": "usbc-port",
diff --git a/thermal/thermal_info_config_husky.json b/thermal/thermal_info_config_husky.json
index 970b6d0..9e659ee 100644
--- a/thermal/thermal_info_config_husky.json
+++ b/thermal/thermal_info_config_husky.json
@@ -3,7 +3,7 @@
{
"Name":"north_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 32.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 32.1, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/north_therm/tz_temp",
"Multiplier":0.001,
@@ -13,7 +13,7 @@
{
"Name":"cam_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 33.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 33.7, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/cam_therm/tz_temp",
"Multiplier":0.001,
@@ -23,7 +23,7 @@
{
"Name":"soc_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 47.2, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 47.2, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/soc_therm/tz_temp",
"Multiplier":0.001,
@@ -33,7 +33,7 @@
{
"Name":"charge_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 48.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 48.4, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/charge_therm/tz_temp",
"Multiplier":0.001,
@@ -43,7 +43,7 @@
{
"Name":"disp_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 31.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 31.7, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/disp_therm/tz_temp",
"Multiplier":0.001,
@@ -53,13 +53,13 @@
{
"Name":"battery",
"Type":"BATTERY",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 60.0],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", 60.0],
"Multiplier":0.001
},
{
"Name":"neutral_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 44.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 44.1, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/neutral_therm/tz_temp",
"Multiplier":0.001,
@@ -69,7 +69,7 @@
{
"Name":"quiet_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 34.6, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 34.6, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/quiet_therm/tz_temp",
"Multiplier":0.001,
@@ -79,7 +79,7 @@
{
"Name":"usb_pwr_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 35.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 35.0, "NaN", "NaN", "NaN", "NaN", "NaN"],
"TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/tz_temp",
"Multiplier":0.001,
"PollingDelay":60000,
@@ -97,7 +97,7 @@
"TriggerSensor": "vdroop1",
"Combination":["battery", "battery_cycle", "vdroop1"],
"Coefficient":[-10000, 400, 1000],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 3.00, "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", 3.00, "NaN"],
"Multiplier":1,
"PollingDelay":0,
"PassiveDelay":1000,
@@ -111,7 +111,7 @@
"TriggerSensor": "vdroop1",
"Combination":["battery", "battery_cycle", "vdroop1"],
"Coefficient":[-10000, 400, 1000],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 3.00, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 3.00, "NaN", "NaN"],
"Multiplier":1,
"PollingDelay":0,
"PassiveDelay":1000,
@@ -121,13 +121,13 @@
{
"Name":"soc",
"Type":"BCL_PERCENTAGE",
- "HotThreshold":["NAN", "NAN", 80, "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", 80, "NaN", "NaN", "NaN", "NaN"],
"Multiplier":1
},
{
"Name":"batoilo",
"Type":"BCL_CURRENT",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 5000, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 5000, "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
"Multiplier":1,
"SendCallback":true,
@@ -142,16 +142,16 @@
"TriggerSensor": "soc",
"Combination":["battery", "soc"],
"Coefficient":[-25000, 80],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 2.0, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 2.0, "NaN", "NaN"],
"PollingDelay":0,
- "PassiveDelay":1000,
+ "PassiveDelay":600000,
"Multiplier":1,
"SendCallback":true
},
{
"Name":"vdroop1",
"Type":"BCL_VOLTAGE",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1000, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 1000, "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
"Multiplier":1,
"SendCallback":true,
@@ -161,7 +161,7 @@
{
"Name":"vdroop2",
"Type":"BCL_VOLTAGE",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1200, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 1200, "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
"Multiplier":1,
"SendCallback":true,
@@ -171,7 +171,7 @@
{
"Name":"smpl_gm",
"Type":"BCL_VOLTAGE",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1100, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 1100, "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
"Multiplier":1,
"SendCallback":true,
@@ -320,7 +320,7 @@
"VIRTUAL-SKIN-SUB-3", "VIRTUAL-SKIN-SUB-4", "VIRTUAL-SKIN-SUB-5",
"VIRTUAL-SKIN-SUB-6", "VIRTUAL-SKIN-SUB-7", "VIRTUAL-SKIN-SUB-8", "VIRTUAL-SKIN-SUB-9", "VIRTUAL-SKIN-SUB-10"],
"Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
- "HotThreshold":["NAN", 39.0, 43.0, 45.0, 46.5, 52.0, 55.0],
+ "HotThreshold":["NaN", 39.0, 43.0, 45.0, 46.5, 52.0, 55.0],
"HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
"Multiplier":0.001,
"SendCallback":true,
@@ -346,7 +346,7 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 37.0, 43.0, 45.0, 46.5, 52.0, 55.0],
+ "HotThreshold":["NaN", 37.0, 43.0, 45.0, 46.5, 52.0, 55.0],
"HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
"Multiplier":0.001,
"SendPowerHint":true,
@@ -362,21 +362,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 37.0, 39.0, "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 37.0, 39.0, "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 1.9, 1.9, 0.0, 0.0, 0.0, 0.0],
"Multiplier":0.001,
"PollingDelay":300000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 2200, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 4600, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+ "K_Po":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 5, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 2200, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 800, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 800, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 4600, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 4, "NaN", "NaN", "NaN", "NaN"]
},
"BindedCdevInfo": [
{
@@ -414,21 +414,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 39.0, 41.0, "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 39.0, 41.0, "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 1.9, 0.0, 0.0, 0.0, 0.0],
"Multiplier":0.001,
"PollingDelay":300000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1500, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 2800, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+ "K_Po":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 5, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1500, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 700, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 2800, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 4, "NaN", "NaN", "NaN", "NaN"]
},
"BindedCdevInfo": [
{
@@ -460,16 +460,19 @@
{
"CdevRequest": "thermal-cpufreq-0",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 6, 6, 6, 6, 6, 6],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-1",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 9, 9, 9, 9, 9, 9],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-2",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 12, 12, 12, 12, 12, 12],
"Disabled":true
}
]
@@ -480,16 +483,19 @@
{
"CdevRequest": "thermal-cpufreq-0",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 6, 6, 6, 6, 6, 6],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-1",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 9, 9, 9, 9, 9, 9],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-2",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 12, 12, 12, 12, 12, 12],
"Disabled":true
}
]
@@ -505,21 +511,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 41.0, 43.0, 52.0, "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 41.0, 43.0, 52.0, "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 1.9, 1.9, 0.0, 0.0, 0.0],
"Multiplier":0.001,
"PollingDelay":300000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1000, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 600, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 1600, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+ "K_Po":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 5, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1000, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 600, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 1600, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 4, "NaN", "NaN", "NaN", "NaN"]
},
"BindedCdevInfo": [
{
@@ -551,16 +557,19 @@
{
"CdevRequest": "thermal-cpufreq-0",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 8, 8, 8, 8, 8, 8],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-1",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 11, 11, 11, 11, 11, 11],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-2",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 13, 13, 13, 13, 13, 13],
"Disabled":true
}
]
@@ -602,21 +611,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 37.0, 43.0, 45.0, 46.5, 52.0, 55.0],
+ "HotThreshold":["NaN", 37.0, 43.0, 45.0, 46.5, 52.0, 55.0],
"HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
"Multiplier":0.001,
"PollingDelay":300000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", "NAN", 5, "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", "NAN", 2600, "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", "NAN", 3900, "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", "NAN", 8, "NAN", "NAN", "NAN"]
+ "K_Po":["NaN", "NaN", "NaN", 300, "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", "NaN", 300, "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", "NaN", 5, "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", "NaN", 0, "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", "NaN", 2600, "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", "NaN", 800, "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", "NaN", 0, "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", "NaN", 3900, "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", "NaN", 8, "NaN", "NaN", "NaN"]
},
"BindedCdevInfo": [
{
@@ -666,21 +675,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 43.0, 45.0, 46.5, 52.0, "NAN", "NAN"],
+ "HotThreshold":["NaN", 43.0, 45.0, 46.5, 52.0, "NaN", "NaN"],
"HotHysteresis":[0.0, 1.9, 1.9, 1.4, 1.9, 0.0, 0.0],
"Multiplier":0.001,
"PollingDelay":300000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1723, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 473, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 2500, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+ "K_Po":["NaN", "NaN", 700, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 700, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 5, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1723, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 473, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 2500, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 4, "NaN", "NaN", "NaN", "NaN"]
},
"BindedCdevInfo": [
{
@@ -698,7 +707,7 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 54.0, "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", 54.0, "NaN"],
"HotHysteresis":[0.0, 0.0, 0.0, 0.0, 0.0, 1.9, 0.0],
"Multiplier":0.001,
"SendCallback":true,
@@ -747,10 +756,12 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN-SPEAKER-SUB-0", "VIRTUAL-SKIN-SPEAKER-SUB-1", "VIRTUAL-SKIN-SPEAKER-SUB-2"],
"Coefficient":[1, 1, 1],
- "HotThreshold":["NAN", 37.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 37.0, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 1.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"Multiplier":0.001,
- "SendCallback":true
+ "SendCallback":true,
+ "PollingDelay":60000,
+ "PassiveDelay":7000
},
{
"Name":"VIRTUAL-SKIN-CHARGE-SUB-0",
@@ -830,21 +841,21 @@
"Formula":"WEIGHTED_AVG",
"Combination":["VIRTUAL-SKIN-CHARGE", "IS_WLC"],
"Coefficient":[1.0, -1000000],
- "HotThreshold":["NAN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
+ "HotThreshold":["NaN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
"HotHysteresis":[0.0, 1.9, 3.9, 2.9, 3.9, 1.9, 1.9],
"Multiplier":0.001,
"PollingDelay":60000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 119, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 119, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 25, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1302, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 2527, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 6219, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 6, "NAN", "NAN", "NAN", "NAN"],
+ "K_Po":["NaN", "NaN", 119, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 119, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 25, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1302, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 2527, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 6219, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 6, "NaN", "NaN", "NaN", "NaN"],
"I_Default":1302
},
"ExcludedPowerInfo": [
@@ -873,21 +884,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN-CHARGE"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
+ "HotThreshold":["NaN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
"HotHysteresis":[0.0, 1.9, 1.9, 3.9, 1.9, 1.9, 1.9],
"Multiplier":0.001,
"PollingDelay":60000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 213, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 213, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 27, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1383, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 2383, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 8022, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 8, "NAN", "NAN", "NAN", "NAN"],
+ "K_Po":["NaN", "NaN", 213, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 213, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 27, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1383, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 2383, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 8022, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 8, "NaN", "NaN", "NaN", "NaN"],
"I_Default":1383
},
"ExcludedPowerInfo": [
@@ -996,7 +1007,7 @@
"TriggerSensor": "usb_pwr_therm",
"Combination":["usb_pwr_therm", "USB-MINUS-NEUTRAL", "USB-MINUS-QUIET", "VIRTUAL-USB-THROTTLING-SUB0"],
"Coefficient":[46000, 0, 0, 1],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "4.0", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "4.0", "NaN", "NaN"],
"BindedCdevInfo": [
{
"CdevRequest": "usbc-port",
@@ -1024,7 +1035,7 @@
"TriggerSensor": "usb_pwr_therm",
"Combination":["usb_pwr_therm", "USB-MINUS-NEUTRAL", "USB-MINUS-QUIET", "VIRTUAL-USB-UI-SUB0"],
"Coefficient":[48000, 0, 0, 1],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "4.0", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "4.0", "NaN"],
"Multiplier":1,
"PollingDelay":300000,
"PassiveDelay":7000,
@@ -1033,31 +1044,31 @@
{
"Name":"LITTLE",
"Type":"CPU",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", "NaN"],
"Multiplier":0.001
},
{
"Name":"MID",
"Type":"CPU",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", "NaN"],
"Multiplier":0.001
},
{
"Name":"BIG",
"Type":"CPU",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", "NaN"],
"Multiplier":0.001
},
{
"Name":"G3D",
"Type":"GPU",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", "NaN"],
"Multiplier":0.001
},
{
"Name":"TPU",
"Type":"NPU",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", "NaN"],
"Multiplier":0.001
}
],
@@ -1186,6 +1197,18 @@
"Thresholds": [31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51]
},
{
+ "Name": "VIRTUAL-SKIN-SUB-8",
+ "Thresholds": [31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51]
+ },
+ {
+ "Name": "VIRTUAL-SKIN-SUB-9",
+ "Thresholds": [31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51]
+ },
+ {
+ "Name": "VIRTUAL-SKIN-SUB-10",
+ "Thresholds": [31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51]
+ },
+ {
"Name": "VIRTUAL-SKIN-CHARGE",
"Thresholds": [31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51]
},
@@ -1193,7 +1216,62 @@
"Name": "VIRTUAL-USB-THROTTLING",
"Thresholds": [3.0]
}
- ]
+ ],
+ "Abnormality": {
+ "Outlier": {
+ "Configs": [
+ {
+ "Monitor": [
+ "VIRTUAL-SKIN",
+ "VIRTUAL-SKIN-SUB-0",
+ "VIRTUAL-SKIN-SUB-1",
+ "VIRTUAL-SKIN-SUB-2",
+ "VIRTUAL-SKIN-SUB-3",
+ "VIRTUAL-SKIN-SUB-4",
+ "VIRTUAL-SKIN-SUB-5",
+ "VIRTUAL-SKIN-SUB-6",
+ "VIRTUAL-SKIN-SUB-7",
+ "VIRTUAL-SKIN-SUB-8",
+ "VIRTUAL-SKIN-SUB-9",
+ "VIRTUAL-SKIN-SUB-10"
+ ],
+ "TempRange": [0.0, 55.0]
+ }
+ ]
+ },
+ "Stuck": {
+ "Configs": [
+ {
+ "Monitor": [
+ "VIRTUAL-SKIN",
+ "VIRTUAL-SKIN-SUB-0",
+ "VIRTUAL-SKIN-SUB-1",
+ "VIRTUAL-SKIN-SUB-2",
+ "VIRTUAL-SKIN-SUB-3",
+ "VIRTUAL-SKIN-SUB-4",
+ "VIRTUAL-SKIN-SUB-5",
+ "VIRTUAL-SKIN-SUB-6",
+ "VIRTUAL-SKIN-SUB-7",
+ "VIRTUAL-SKIN-SUB-8",
+ "VIRTUAL-SKIN-SUB-9",
+ "VIRTUAL-SKIN-SUB-10",
+ "VIRTUAL-SKIN-SPEAKER",
+ "VIRTUAL-SKIN-SPEAKER-SUB-0",
+ "VIRTUAL-SKIN-SPEAKER-SUB-1",
+ "VIRTUAL-SKIN-SPEAKER-SUB-2",
+ "VIRTUAL-SKIN-FRONT",
+ "VIRTUAL-SKIN-FRONT-SUB-0",
+ "VIRTUAL-SKIN-FRONT-SUB-1",
+ "VIRTUAL-SKIN-FRONT-SUB-2"
+ ],
+ "TempStuck": {
+ "MinPollingCount": 8,
+ "MinStuckDuration": 120000
+ }
+ }
+ ]
+ }
+ }
},
"CoolingDevices": {
"RecordVotePerSensor": {
diff --git a/thermal/thermal_info_config_ripcurrent.json b/thermal/thermal_info_config_ripcurrent.json
index 009b1b5..266965d 100644
--- a/thermal/thermal_info_config_ripcurrent.json
+++ b/thermal/thermal_info_config_ripcurrent.json
@@ -4,75 +4,75 @@
"Name":"battery",
"Type":"BATTERY",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
"60.0"
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":0.001
},
{
"Name":"LITTLE",
"Type":"CPU",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
115.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":0.001
},
{
"Name":"MID",
"Type":"CPU",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
115.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":0.001
},
{
"Name":"G3D",
"Type":"GPU",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
115.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":0.001
},
{
"Name":"battery_cycle",
"Type":"BCL_VOLTAGE",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN"
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN"
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1,
"Monitor":false
},
@@ -93,15 +93,15 @@
"1000"
],
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
3.00,
- "NAN"
+ "NaN"
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1,
"Monitor":true
},
@@ -122,15 +122,15 @@
"1000"
],
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
3.00,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1,
"Monitor":true,
"SendPowerHint":true
@@ -139,28 +139,28 @@
"Name":"soc",
"Type":"BCL_PERCENTAGE",
"HotThreshold":[
- "NAN",
+ "NaN",
80,
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN"
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN"
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1
},
{
"Name":"batoilo",
"Type":"BCL_CURRENT",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
5000,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
"HotHysteresis":[
0.0,
@@ -171,7 +171,7 @@
0.0,
0.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1,
"Monitor":true,
"PollingDelay":0,
@@ -202,15 +202,15 @@
"80"
],
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
2.0,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1,
"Monitor":true
},
@@ -218,13 +218,13 @@
"Name":"vdroop1",
"Type":"BCL_VOLTAGE",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
1000,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
"HotHysteresis":[
0.0,
@@ -235,7 +235,7 @@
0.0,
0.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1,
"Monitor":true,
"PollingDelay":0,
@@ -255,13 +255,13 @@
"Name":"vdroop2",
"Type":"BCL_VOLTAGE",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
1200,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
"HotHysteresis":[
0.0,
@@ -272,7 +272,7 @@
0.0,
0.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1,
"Monitor":true,
"PollingDelay":0,
@@ -292,13 +292,13 @@
"Name":"smpl_gm",
"Type":"BCL_VOLTAGE",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
1100,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
"HotHysteresis":[
0.0,
@@ -309,7 +309,7 @@
0.0,
0.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1,
"Monitor":true,
"PollingDelay":0,
@@ -329,13 +329,13 @@
"Name":"ocp_cpu2",
"Type":"BCL_CURRENT",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
12000,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
"HotHysteresis":[
0.0,
@@ -346,20 +346,20 @@
0.0,
0.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1
},
{
"Name":"ocp_tpu",
"Type":"BCL_CURRENT",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
10500,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
"HotHysteresis":[
0.0,
@@ -370,20 +370,20 @@
0.0,
0.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1
},
{
"Name":"ocp_gpu",
"Type":"BCL_CURRENT",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
12000,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
"HotHysteresis":[
0.0,
@@ -394,20 +394,20 @@
0.0,
0.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1
},
{
"Name":"soft_ocp_cpu2",
"Type":"BCL_CURRENT",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
9000,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
"HotHysteresis":[
0.0,
@@ -418,20 +418,20 @@
0.0,
0.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1
},
{
"Name":"soft_ocp_tpu",
"Type":"BCL_CURRENT",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
8500,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
"HotHysteresis":[
0.0,
@@ -442,20 +442,20 @@
0.0,
0.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1
},
{
"Name":"soft_ocp_gpu",
"Type":"BCL_CURRENT",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
9000,
- "NAN",
- "NAN"
+ "NaN",
+ "NaN"
],
"HotHysteresis":[
0.0,
@@ -466,22 +466,22 @@
0.0,
0.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":1
},
{
"Name":"TPU",
"Type":"NPU",
"HotThreshold":[
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
- "NAN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
+ "NaN",
115.0
],
- "VrThreshold":"NAN",
+ "VrThreshold":"NaN",
"Multiplier":0.001
}
],
diff --git a/thermal/thermal_info_config_shiba.json b/thermal/thermal_info_config_shiba.json
index 87adbb9..988dac3 100644
--- a/thermal/thermal_info_config_shiba.json
+++ b/thermal/thermal_info_config_shiba.json
@@ -3,7 +3,7 @@
{
"Name":"north_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 38.8, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 38.8, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/north_therm/tz_temp",
"Multiplier":0.001,
@@ -13,7 +13,7 @@
{
"Name":"cam_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 31.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 31.0, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/cam_therm/tz_temp",
"Multiplier":0.001,
@@ -23,7 +23,7 @@
{
"Name":"soc_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 41.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 41.4, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/soc_therm/tz_temp",
"Multiplier":0.001,
@@ -33,7 +33,7 @@
{
"Name":"charge_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 42.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 42.4, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/charge_therm/tz_temp",
"Multiplier":0.001,
@@ -43,7 +43,7 @@
{
"Name":"disp_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 31.2, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 31.2, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/disp_therm/tz_temp",
"Multiplier":0.001,
@@ -53,13 +53,13 @@
{
"Name":"battery",
"Type":"BATTERY",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 60.0],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", 60.0],
"Multiplier":0.001
},
{
"Name":"neutral_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 41.5, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 41.5, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/neutral_therm/tz_temp",
"Multiplier":0.001,
@@ -69,7 +69,7 @@
{
"Name":"quiet_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 35.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 35.1, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"TempPath":"/dev/thermal/tz-by-name/quiet_therm/tz_temp",
"Multiplier":0.001,
@@ -79,7 +79,7 @@
{
"Name":"usb_pwr_therm",
"Type":"UNKNOWN",
- "HotThreshold":["NAN", 35.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 35.0, "NaN", "NaN", "NaN", "NaN", "NaN"],
"TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/tz_temp",
"Multiplier":0.001,
"PollingDelay":60000,
@@ -97,7 +97,7 @@
"TriggerSensor": "vdroop1",
"Combination":["battery", "battery_cycle", "vdroop1"],
"Coefficient":[-10000, 400, 1000],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 3.00, "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", 3.00, "NaN"],
"Multiplier":1,
"PollingDelay":0,
"PassiveDelay":1000,
@@ -111,7 +111,7 @@
"TriggerSensor": "vdroop1",
"Combination":["battery", "battery_cycle", "vdroop1"],
"Coefficient":[-10000, 400, 1000],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 3.00, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 3.00, "NaN", "NaN"],
"Multiplier":1,
"PollingDelay":0,
"PassiveDelay":1000,
@@ -121,13 +121,13 @@
{
"Name":"soc",
"Type":"BCL_PERCENTAGE",
- "HotThreshold":["NAN", "NAN", 80, "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", 80, "NaN", "NaN", "NaN", "NaN"],
"Multiplier":1
},
{
"Name":"batoilo",
"Type":"BCL_CURRENT",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 5000, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 5000, "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
"Multiplier":1,
"SendCallback":true,
@@ -142,16 +142,16 @@
"TriggerSensor": "soc",
"Combination":["battery", "soc"],
"Coefficient":[-25000, 80],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 2.0, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 2.0, "NaN", "NaN"],
"PollingDelay":0,
- "PassiveDelay":1000,
+ "PassiveDelay":600000,
"Multiplier":1,
"SendCallback":true
},
{
"Name":"vdroop1",
"Type":"BCL_VOLTAGE",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1000, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 1000, "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
"Multiplier":1,
"SendCallback":true,
@@ -161,7 +161,7 @@
{
"Name":"vdroop2",
"Type":"BCL_VOLTAGE",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1200, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 1200, "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
"Multiplier":1,
"SendCallback":true,
@@ -171,7 +171,7 @@
{
"Name":"smpl_gm",
"Type":"BCL_VOLTAGE",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1100, "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", 1100, "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
"Multiplier":1,
"SendCallback":true,
@@ -288,7 +288,7 @@
"VIRTUAL-SKIN-SUB-3", "VIRTUAL-SKIN-SUB-4", "VIRTUAL-SKIN-SUB-5",
"VIRTUAL-SKIN-SUB-6", "VIRTUAL-SKIN-SUB-7", "VIRTUAL-SKIN-SUB-8"],
"Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
- "HotThreshold":["NAN", 39.0, 43.0, 45.0, 46.5, 52.0, 55.0],
+ "HotThreshold":["NaN", 39.0, 43.0, 45.0, 46.5, 52.0, 55.0],
"HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
"Multiplier":0.001,
"SendCallback":true,
@@ -314,7 +314,7 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 37.0, 43.0, 45.0, 46.5, 52.0, 55.0],
+ "HotThreshold":["NaN", 37.0, 43.0, 45.0, 46.5, 52.0, 55.0],
"HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
"Multiplier":0.001,
"SendPowerHint":true,
@@ -330,21 +330,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 37.0, 39.0, "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 37.0, 39.0, "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 1.9, 1.9, 0.0, 0.0, 0.0, 0.0],
"Multiplier":0.001,
"PollingDelay":300000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 2200, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 4600, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+ "K_Po":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 5, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 2200, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 800, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 800, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 4600, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 4, "NaN", "NaN", "NaN", "NaN"]
},
"BindedCdevInfo": [
{
@@ -382,21 +382,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 39.0, 41.0, "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 39.0, 41.0, "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 1.9, 0.0, 0.0, 0.0, 0.0],
"Multiplier":0.001,
"PollingDelay":300000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1500, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 2800, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+ "K_Po":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 5, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1500, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 700, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 2800, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 4, "NaN", "NaN", "NaN", "NaN"]
},
"BindedCdevInfo": [
{
@@ -428,16 +428,19 @@
{
"CdevRequest": "thermal-cpufreq-0",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 6, 6, 6, 6, 6, 6],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-1",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 9, 9, 9, 9, 9, 9],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-2",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 12, 12, 12, 12, 12, 12],
"Disabled":true
}
]
@@ -448,16 +451,19 @@
{
"CdevRequest": "thermal-cpufreq-0",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 6, 6, 6, 6, 6, 6],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-1",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 9, 9, 9, 9, 9, 9],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-2",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 12, 12, 12, 12, 12, 12],
"Disabled":true
}
]
@@ -473,21 +479,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 41.0, 43.0, 52.0, "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 41.0, 43.0, 52.0, "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 0.0, 1.9, 1.9, 0.0, 0.0, 0.0],
"Multiplier":0.001,
"PollingDelay":300000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1000, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 600, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 1600, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+ "K_Po":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 400, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 5, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1000, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 600, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 1600, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 4, "NaN", "NaN", "NaN", "NaN"]
},
"BindedCdevInfo": [
{
@@ -519,16 +525,19 @@
{
"CdevRequest": "thermal-cpufreq-0",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 8, 8, 8, 8, 8, 8],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-1",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 11, 11, 11, 11, 11, 11],
"Disabled":true
},
{
"CdevRequest": "thermal-cpufreq-2",
"MaxReleaseStep": 1,
+ "CdevCeiling": [0, 13, 13, 13, 13, 13, 13],
"Disabled":true
}
]
@@ -570,21 +579,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 37.0, 43.0, 45.0, 46.5, 52.0, 55.0],
+ "HotThreshold":["NaN", 37.0, 43.0, 45.0, 46.5, 52.0, 55.0],
"HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
"Multiplier":0.001,
"PollingDelay":300000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", "NAN", 5, "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", "NAN", 2600, "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", "NAN", 3900, "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", "NAN", 8, "NAN", "NAN", "NAN"]
+ "K_Po":["NaN", "NaN", "NaN", 300, "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", "NaN", 300, "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", "NaN", 5, "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", "NaN", 0, "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", "NaN", 2600, "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", "NaN", 800, "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", "NaN", 0, "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", "NaN", 3900, "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", "NaN", 8, "NaN", "NaN", "NaN"]
},
"BindedCdevInfo": [
{
@@ -634,21 +643,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 43.0, 45.0, 46.5, 52.0, "NAN", "NAN"],
+ "HotThreshold":["NaN", 43.0, 45.0, 46.5, 52.0, "NaN", "NaN"],
"HotHysteresis":[0.0, 1.9, 1.9, 1.4, 1.9, 0.0, 0.0],
"Multiplier":0.001,
"PollingDelay":300000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1723, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 473, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 2500, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+ "K_Po":["NaN", "NaN", 700, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 700, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 5, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1723, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 473, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 2500, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 4, "NaN", "NaN", "NaN", "NaN"]
},
"BindedCdevInfo": [
{
@@ -666,7 +675,7 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 54.0, "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", 54.0, "NaN"],
"HotHysteresis":[0.0, 0.0, 0.0, 0.0, 0.0, 1.9, 0.0],
"Multiplier":0.001,
"SendCallback":true,
@@ -726,10 +735,12 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN-SPEAKER-SUB-0", "VIRTUAL-SKIN-SPEAKER-SUB-1", "VIRTUAL-SKIN-SPEAKER-SUB-2", "VIRTUAL-SKIN-SPEAKER-SUB-3"],
"Coefficient":[1, 1, 1, 1],
- "HotThreshold":["NAN", 37.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", 37.0, "NaN", "NaN", "NaN", "NaN", "NaN"],
"HotHysteresis":[0.0, 1.9, 0.0, 0.0, 0.0, 0.0, 0.0],
"Multiplier":0.001,
- "SendCallback":true
+ "SendCallback":true,
+ "PollingDelay":60000,
+ "PassiveDelay":7000
},
{
"Name":"VIRTUAL-SKIN-CHARGE-SUB-0",
@@ -842,21 +853,21 @@
"Formula":"WEIGHTED_AVG",
"Combination":["VIRTUAL-SKIN-CHARGE", "IS_WLC"],
"Coefficient":[1.0, -1000000],
- "HotThreshold":["NAN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
+ "HotThreshold":["NaN", 34.0, 38.0, 41.0, 45.0, 47.0, 55.0],
"HotHysteresis":[0.0, 1.9, 3.9, 2.9, 3.9, 1.9, 1.9],
"Multiplier":0.001,
"PollingDelay":60000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 101, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 101, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 21, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1099, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 2404, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 5519, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 6, "NAN", "NAN", "NAN", "NAN"],
+ "K_Po":["NaN", "NaN", 101, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 101, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 21, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1099, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 2404, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 5519, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 6, "NaN", "NaN", "NaN", "NaN"],
"I_Default":1099
},
"ExcludedPowerInfo": [
@@ -885,21 +896,21 @@
"Formula":"MAXIMUM",
"Combination":["VIRTUAL-SKIN-CHARGE"],
"Coefficient":[1.0],
- "HotThreshold":["NAN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
+ "HotThreshold":["NaN", 35.0, 41.0, 45.0, 47.0, 51.0, 55.0],
"HotHysteresis":[0.0, 1.9, 1.9, 3.9, 1.9, 1.9, 1.9],
"Multiplier":0.001,
"PollingDelay":60000,
"PassiveDelay":7000,
"PIDInfo": {
- "K_Po":["NAN", "NAN", 164, "NAN", "NAN", "NAN", "NAN"],
- "K_Pu":["NAN", "NAN", 164, "NAN", "NAN", "NAN", "NAN"],
- "K_I":["NAN", "NAN", 21, "NAN", "NAN", "NAN", "NAN"],
- "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "I_Max":["NAN", "NAN", 1066, "NAN", "NAN", "NAN", "NAN"],
- "S_Power":["NAN", "NAN", 2066, "NAN", "NAN", "NAN", "NAN"],
- "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
- "MaxAllocPower":["NAN", "NAN", 6412, "NAN", "NAN", "NAN", "NAN"],
- "I_Cutoff":["NAN", "NAN", 8, "NAN", "NAN", "NAN", "NAN"],
+ "K_Po":["NaN", "NaN", 164, "NaN", "NaN", "NaN", "NaN"],
+ "K_Pu":["NaN", "NaN", 164, "NaN", "NaN", "NaN", "NaN"],
+ "K_I":["NaN", "NaN", 21, "NaN", "NaN", "NaN", "NaN"],
+ "K_D":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "I_Max":["NaN", "NaN", 1066, "NaN", "NaN", "NaN", "NaN"],
+ "S_Power":["NaN", "NaN", 2066, "NaN", "NaN", "NaN", "NaN"],
+ "MinAllocPower":["NaN", "NaN", 0, "NaN", "NaN", "NaN", "NaN"],
+ "MaxAllocPower":["NaN", "NaN", 6412, "NaN", "NaN", "NaN", "NaN"],
+ "I_Cutoff":["NaN", "NaN", 8, "NaN", "NaN", "NaN", "NaN"],
"I_Default":1066
},
"ExcludedPowerInfo": [
@@ -1029,7 +1040,7 @@
"TriggerSensor": "usb_pwr_therm",
"Combination":["usb_pwr_therm", "USB-MINUS-NEUTRAL", "USB-MINUS-QUIET", "VIRTUAL-USB-THROTTLING-SUB0"],
"Coefficient":[46000, 0, 0, 1],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "4.0", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "4.0", "NaN", "NaN"],
"BindedCdevInfo": [
{
"CdevRequest": "usbc-port",
@@ -1057,7 +1068,7 @@
"TriggerSensor": "usb_pwr_therm",
"Combination":["usb_pwr_therm", "USB-MINUS-NEUTRAL", "USB-MINUS-QUIET", "VIRTUAL-USB-UI-SUB0"],
"Coefficient":[48000, 0, 0, 1],
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "4.0", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "4.0", "NaN"],
"Multiplier":1,
"PollingDelay":300000,
"PassiveDelay":7000,
@@ -1066,31 +1077,31 @@
{
"Name":"LITTLE",
"Type":"CPU",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", "NaN"],
"Multiplier":0.001
},
{
"Name":"MID",
"Type":"CPU",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", "NaN"],
"Multiplier":0.001
},
{
"Name":"BIG",
"Type":"CPU",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", "NaN"],
"Multiplier":0.001
},
{
"Name":"G3D",
"Type":"GPU",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", "NaN"],
"Multiplier":0.001
},
{
"Name":"TPU",
"Type":"NPU",
- "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
+ "HotThreshold":["NaN", "NaN", "NaN", "NaN", "NaN", "NaN", "NaN"],
"Multiplier":0.001
}
],
@@ -1226,7 +1237,61 @@
"Name": "VIRTUAL-USB-THROTTLING",
"Thresholds": [3.0]
}
- ]
+ ],
+ "Abnormality": {
+ "Outlier": {
+ "Configs": [
+ {
+ "Monitor": [
+ "VIRTUAL-SKIN",
+ "VIRTUAL-SKIN-SUB-0",
+ "VIRTUAL-SKIN-SUB-1",
+ "VIRTUAL-SKIN-SUB-2",
+ "VIRTUAL-SKIN-SUB-3",
+ "VIRTUAL-SKIN-SUB-4",
+ "VIRTUAL-SKIN-SUB-5",
+ "VIRTUAL-SKIN-SUB-6",
+ "VIRTUAL-SKIN-SUB-7",
+ "VIRTUAL-SKIN-SUB-8"
+ ],
+ "TempRange": [0.0, 55.0]
+ }
+ ]
+ },
+ "Stuck": {
+ "Configs": [
+ {
+ "Monitor": [
+ "VIRTUAL-SKIN",
+ "VIRTUAL-SKIN-SUB-0",
+ "VIRTUAL-SKIN-SUB-1",
+ "VIRTUAL-SKIN-SUB-2",
+ "VIRTUAL-SKIN-SUB-3",
+ "VIRTUAL-SKIN-SUB-4",
+ "VIRTUAL-SKIN-SUB-5",
+ "VIRTUAL-SKIN-SUB-6",
+ "VIRTUAL-SKIN-SUB-7",
+ "VIRTUAL-SKIN-SUB-8",
+ "VIRTUAL-SKIN-SPEAKER",
+ "VIRTUAL-SKIN-SPEAKER-SUB-0",
+ "VIRTUAL-SKIN-SPEAKER-SUB-1",
+ "VIRTUAL-SKIN-SPEAKER-SUB-2",
+ "VIRTUAL-SKIN-SPEAKER-SUB-3",
+ "VIRTUAL-SKIN-FRONT",
+ "VIRTUAL-SKIN-FRONT-SUB-0",
+ "VIRTUAL-SKIN-FRONT-SUB-1",
+ "VIRTUAL-SKIN-FRONT-SUB-2",
+ "VIRTUAL-SKIN-FRONT-SUB-3",
+ "VIRTUAL-SKIN-FRONT-SUB-4"
+ ],
+ "TempStuck": {
+ "MinPollingCount": 8,
+ "MinStuckDuration": 120000
+ }
+ }
+ ]
+ }
+ }
},
"CoolingDevices": {
"RecordVotePerSensor": {
diff --git a/thermal/thermal_info_config_test.h b/thermal/thermal_info_config_test.h
new file mode 100644
index 0000000..1864420
--- /dev/null
+++ b/thermal/thermal_info_config_test.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2023 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#include <string>
+
+#include <gmock/gmock.h>
+#include <jsonpb/json_schema_test.h>
+
+#include "thermal_info_config.pb.h"
+
+namespace devices {
+namespace shusky {
+
+// JSON schema test wrapper.
+class ThermalInfoConfigTest : public android::jsonpb::JsonSchemaTest {
+public:
+ void SetUp() override {
+ JsonSchemaTest::SetUp();
+ thermalInfoConfig_ = static_cast<ThermalConfig *>(message());
+ }
+ ThermalConfig *thermalInfoConfig_ = nullptr;
+};
+
+// Individual test checking for sensor name and type as required fields.
+TEST_P(ThermalInfoConfigTest, ThermalConfigRequiredFields) {
+ std::string error;
+
+ // Checks that no unknown fields are introduced.
+ EXPECT_TRUE(android::jsonpb::AllFieldsAreKnown(*object_, json_, &error))
+ << "File: " << file_path_ << ": " << error;
+
+ // Check all Sensors have a Name and Type.
+ for (int i = 0; i < thermalInfoConfig_->sensors_size(); ++i) {
+ auto &&sensor = thermalInfoConfig_->sensors(i);
+ EXPECT_FALSE(sensor.name().empty())
+ << "No name for sensor #" << i << " in " << file_path_;
+ EXPECT_FALSE(sensor.type().empty())
+ << "No type for sensor " << sensor.name() << " in " << file_path_;
+ }
+};
+
+} // namespace shusky
+} // namespace devices
\ No newline at end of file
diff --git a/uwb/Android.bp b/uwb/Android.bp
new file mode 100644
index 0000000..617b368
--- /dev/null
+++ b/uwb/Android.bp
@@ -0,0 +1,70 @@
+//
+// Copyright (C) 2021 The Android Open-Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+soong_namespace {}
+
+prebuilt_defaults {
+ name: "conf_defaults",
+ vendor: true,
+ sub_dir: "uwb",
+}
+
+prebuilt_etc {
+ name: "configuration.conf",
+ src: "configuration.conf",
+ defaults: ["conf_defaults"],
+}
+
+prebuilt_etc {
+ name: "calibration.conf",
+ src: "calibration.conf",
+ defaults: ["conf_defaults"],
+}
+
+prebuilt_etc {
+ name: "calibration-default.conf",
+ src: "calibration-default.conf",
+ defaults: ["conf_defaults"],
+}
+
+prebuilt_etc {
+ name: "calibration-CE.conf",
+ src: "calibration-CE.conf",
+ defaults: ["conf_defaults"],
+}
+
+prebuilt_etc {
+ name: "calibration-FCC.conf",
+ src: "calibration-FCC.conf",
+ defaults: ["conf_defaults"],
+}
+
+prebuilt_etc {
+ name: "calibration-JP.conf",
+ src: "calibration-JP.conf",
+ defaults: ["conf_defaults"],
+}
+
+prebuilt_etc {
+ name: "calibration-TW.conf",
+ src: "calibration-TW.conf",
+ defaults: ["conf_defaults"],
+}
+
+prebuilt_etc {
+ name: "calibration-RESTRICTED.conf",
+ src: "calibration-RESTRICTED.conf",
+ defaults: ["conf_defaults"],
+}
diff --git a/uwb/UWB-calibration.conf b/uwb/UWB-calibration.conf
deleted file mode 100644
index 52a528d..0000000
--- a/uwb/UWB-calibration.conf
+++ /dev/null
@@ -1,142 +0,0 @@
-[CCC]version=2
-[CCC]ant0.ch5.prf64.pdoa_iso_rf2_rf1=0
-[CCC]ant0.ch5.prf64.pdoa_iso_rf1_rf2=0
-[CCC]ant0.ch9.prf64.pdoa_iso_rf2_rf1=0
-[CCC]ant0.ch9.prf64.pdoa_iso_rf1_rf2=0
-[CCC]ant0.ch5.prf64.pdoa_offset=0
-[CCC]ant0.ch9.prf64.pdoa_offset=0
-[CCC]ant0.ch5.prf64.pll_locking_code=0
-[CCC]ant0.ch9.prf64.pll_locking_code=0
-[CCC]id=0
-[CCC]wifi_coex_time_gap=10
-[CCC]ap_coop_mode=1
-[CCC]antenna_selection=4
-ant0.ch5.prf16.ant_delay=16450
-ant0.ch5.prf16.tx_power=0
-ant0.ch5.prf16.pg_count=0
-ant0.ch5.prf16.pg_delay=0
-ant0.ch5.prf64.ant_delay=16450
-ant0.ch5.prf64.tx_power=0
-ant0.ch5.prf64.pg_count=0
-ant0.ch5.prf64.pg_delay=0
-ant0.ch9.prf16.ant_delay=16450
-ant0.ch9.prf16.tx_power=0
-ant0.ch9.prf16.pg_count=0
-ant0.ch9.prf16.pg_delay=0
-ant0.ch9.prf64.ant_delay=16450
-ant0.ch9.prf64.tx_power=0
-ant0.ch9.prf64.pg_count=0
-ant0.ch9.prf64.pg_delay=0
-ant0.port=0
-ant0.selector_gpio=7
-ant0.selector_gpio_value=0
-ant1.ch5.prf16.ant_delay=16450
-ant1.ch5.prf16.tx_power=0
-ant1.ch5.prf16.pg_count=0
-ant1.ch5.prf16.pg_delay=0
-ant1.ch5.prf64.ant_delay=16450
-ant1.ch5.prf64.tx_power=0
-ant1.ch5.prf64.pg_count=0
-ant1.ch5.prf64.pg_delay=0
-ant1.ch9.prf16.ant_delay=16450
-ant1.ch9.prf16.tx_power=0
-ant1.ch9.prf16.pg_count=0
-ant1.ch9.prf16.pg_delay=0
-ant1.ch9.prf64.ant_delay=16450
-ant1.ch9.prf64.tx_power=0
-ant1.ch9.prf64.pg_count=0
-ant1.ch9.prf64.pg_delay=0
-ant1.port=0
-ant1.selector_gpio=7
-ant1.selector_gpio_value=1
-ant2.ch5.prf16.ant_delay=16450
-ant2.ch5.prf16.tx_power=0
-ant2.ch5.prf16.pg_count=0
-ant2.ch5.prf16.pg_delay=0
-ant2.ch5.prf64.ant_delay=16450
-ant2.ch5.prf64.tx_power=0
-ant2.ch5.prf64.pg_count=0
-ant2.ch5.prf64.pg_delay=0
-ant2.ch9.prf16.ant_delay=16450
-ant2.ch9.prf16.tx_power=0
-ant2.ch9.prf16.pg_count=0
-ant2.ch9.prf16.pg_delay=0
-ant2.ch9.prf64.ant_delay=16450
-ant2.ch9.prf64.tx_power=0
-ant2.ch9.prf64.pg_count=0
-ant2.ch9.prf64.pg_delay=0
-ant2.port=1
-ant2.selector_gpio=6
-ant2.selector_gpio_value=0
-ant3.ch5.prf16.ant_delay=16450
-ant3.ch5.prf16.tx_power=0
-ant3.ch5.prf16.pg_count=0
-ant3.ch5.prf16.pg_delay=0
-ant3.ch5.prf64.ant_delay=16450
-ant3.ch5.prf64.tx_power=0
-ant3.ch5.prf64.pg_count=0
-ant3.ch5.prf64.pg_delay=0
-ant3.ch9.prf16.ant_delay=16450
-ant3.ch9.prf16.tx_power=0
-ant3.ch9.prf16.pg_count=0
-ant3.ch9.prf16.pg_delay=0
-ant3.ch9.prf64.ant_delay=16450
-ant3.ch9.prf64.tx_power=0
-ant3.ch9.prf64.pg_count=0
-ant3.ch9.prf64.pg_delay=0
-ant3.port=1
-ant3.selector_gpio=6
-ant3.selector_gpio_value=1
-ant0.ant1.ch5.pdoa_offset=0
-ant0.ant1.ch9.pdoa_offset=0
-ant0.ant2.ch5.pdoa_offset=0
-ant0.ant2.ch9.pdoa_offset=0
-ant1.ant2.ch5.pdoa_offset=2173
-ant1.ant2.ch9.pdoa_offset=3555
-ant0.ant3.ch5.pdoa_offset=0
-ant0.ant3.ch9.pdoa_offset=0
-ant1.ant3.ch5.pdoa_offset=3845
-ant1.ant3.ch9.pdoa_offset=647
-ant2.ant3.ch5.pdoa_offset=0
-ant2.ant3.ch9.pdoa_offset=0
-ch5.pll_locking_code=0
-ch9.pll_locking_code=0
-ant1.ant2.ch5.pdoa_lut=3d:ea:7b:0a:66:ea:c3:09:a4:ea:0a:09:cd:ea:66:08:0a:eb:ae:07:33:eb:f6:06:48:eb:52:06:71:eb:9a:05:c3:eb:e1:04:e1:ec:29:04:c3:ef:85:03:a4:f4:cd:02:14:f8:14:02:b8:fa:5c:01:8f:fc:b8:00:e1:fe:00:00:48:01:48:ff:85:03:a4:fe:ae:05:ec:fd:00:08:33:fd:d7:09:7b:fc:85:0b:d7:fb:0a:0d:1f:fb:66:0e:66:fa:33:0f:ae:f9:00:10:0a:f9:a4:10:52:f8:1f:11:9a:f7:5c:11:f6:f6:9a:11:3d:f6:ae:11:85:f5
-ant1.ant2.ch9.pdoa_lut=c3:ed:7b:0a:29:ee:c3:09:3d:ee:0a:09:cd:ee:66:08:c3:ef:ae:07:f6:f0:f6:06:3d:f2:52:06:52:f2:9a:05:cd:f2:e1:04:5c:f3:29:04:c3:f3:85:03:b8:f4:cd:02:71:f7:14:02:52:fa:5c:01:85:fd:b8:00:00:00:00:00:0a:01:48:ff:5c:01:a4:fe:14:02:ec:fd:5c:03:33:fd:48:05:7b:fc:b8:06:d7:fb:14:08:1f:fb:33:09:66:fa:ec:09:ae:f9:3d:0a:0a:f9:0a:0b:52:f8:1f:0b:9a:f7:48:0b:f6:f6:85:0b:3d:f6:9a:0b:85:f5
-ant1.ant3.ch5.pdoa_lut=66:ec:7b:0a:e1:ec:c3:09:14:ee:0a:09:d7:ef:66:08:8f:f2:ae:07:00:f6:f6:06:cd:f6:52:06:33:f7:9a:05:d7:f7:e1:04:48:f9:29:04:33:fd:85:03:d7:fd:cd:02:3d:fe:14:02:ec:ff:5c:01:14:00:b8:00:3d:00:00:00:cd:02:48:ff:29:04:a4:fe:a4:04:ec:fd:85:05:33:fd:e1:06:7b:fc:b8:08:d7:fb:14:0a:1f:fb:e1:0a:66:fa:1f:0b:0a:f9:1f:0b:ae:f9:5c:0b:52:f8:c3:0b:9a:f7:52:0c:f6:f6:0a:0d:3d:f6:00:0e:85:f5
-ant1.ant3.ch9.pdoa_lut=0a:ef:7b:0a:c3:ef:c3:09:00:f0:0a:09:14:f0:66:08:7b:f0:ae:07:48:f1:f6:06:00:f2:52:06:c3:f3:9a:05:00:f6:e1:04:d7:f7:29:04:1f:f9:85:03:ae:f9:cd:02:e1:fa:14:02:e1:fc:5c:01:b8:fe:b8:00:c3:ff:00:00:00:02:48:ff:5c:05:a4:fe:52:08:ec:fd:14:0a:33:fd:e1:0a:7b:fc:14:0c:d7:fb:14:0e:1f:fb:1f:0f:66:fa:00:10:ae:f9:b8:10:0a:f9:29:12:52:f8:00:14:9a:f7:7b:16:f6:f6:d7:17:3d:f6:29:18:85:f5
-xtal_trim=23
-temperature_reference=85
-smart_tx_power=1
-auto_sleep_margin=20000
-restricted_channels=0
-[HAL]aoa_capability=1
-[HAL]ant_sets.ch5.range.rx_ant_set_nonranging = 6
-[HAL]ant_sets.ch5.range.rx_ant_set_ranging = 3
-[HAL]ant_sets.ch5.range.tx_ant_set_nonranging = 0
-[HAL]ant_sets.ch5.range.tx_ant_set_ranging = 0
-[HAL]ant_sets.ch5.azimuth.rx_ant_set_nonranging = 6
-[HAL]ant_sets.ch5.azimuth.rx_ant_set_ranging = 3
-[HAL]ant_sets.ch5.azimuth.tx_ant_set_nonranging = 0
-[HAL]ant_sets.ch5.azimuth.tx_ant_set_ranging = 0
-[HAL]ant_sets.ch9.range.rx_ant_set_nonranging = 6
-[HAL]ant_sets.ch9.range.rx_ant_set_ranging = 3
-[HAL]ant_sets.ch9.range.tx_ant_set_nonranging = 0
-[HAL]ant_sets.ch9.range.tx_ant_set_ranging = 0
-[HAL]ant_sets.ch5.elevation.rx_ant_set_nonranging = 6
-[HAL]ant_sets.ch5.elevation.rx_ant_set_ranging = 1
-[HAL]ant_sets.ch5.elevation.tx_ant_set_nonranging = 0
-[HAL]ant_sets.ch5.elevation.tx_ant_set_ranging = 0
-[HAL]ant_sets.ch9.elevation.rx_ant_set_nonranging = 6
-[HAL]ant_sets.ch9.elevation.rx_ant_set_ranging = 1
-[HAL]ant_sets.ch9.elevation.tx_ant_set_nonranging = 0
-[HAL]ant_sets.ch9.elevation.tx_ant_set_ranging = 0
-[HAL]ant_sets.ch9.azimuth.rx_ant_set_nonranging = 6
-[HAL]ant_sets.ch9.azimuth.rx_ant_set_ranging = 3
-[HAL]ant_sets.ch9.azimuth.tx_ant_set_nonranging = 0
-[HAL]ant_sets.ch9.azimuth.tx_ant_set_ranging = 0
-[HAL]minimum_system_offset_uwbtime0=500
-coex_gpio=4
-coex_delay_us=1000
-coex_margin_us=500
-coex_interval_us=2000
diff --git a/uwb/calibration-CE.conf b/uwb/calibration-CE.conf
new file mode 100644
index 0000000..e1a45aa
--- /dev/null
+++ b/uwb/calibration-CE.conf
@@ -0,0 +1,151 @@
+# CE calibration file
+
+# ANT0 CH5 configuration
+#3C3C3C3C FF 0x34 0xFFFFFFFF
+#3E3E3E3E FF 0x34 0xFFFFFFFF
+#38403838 FF 0x34 0xFFFFFFFF
+#33333333 FF 0x34 0xFFFFFFFF
+#37373737 FF 0x34 0xFFFFFFFF
+#37373737 FF 0x34 0xFFFFFFFF
+#32323232 FF 0x34 0xFFFFFFFF
+
+# tx power
+ant0.ch5.ref_frame0.tx_power_index=3C:3C:3C:3C
+ant0.ch5.ref_frame1.tx_power_index=3E:3E:3E:3E
+ant0.ch5.ref_frame2.tx_power_index=38:38:40:38
+ant0.ch5.ref_frame3.tx_power_index=33:33:33:33
+ant0.ch5.ref_frame4.tx_power_index=37:37:37:37
+ant0.ch5.ref_frame5.tx_power_index=37:37:37:37
+ant0.ch5.ref_frame6.tx_power_index=32:32:32:32
+ant0.ch5.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant0.ch5.ref_frame0.post_tx_power_index=0xff
+ant0.ch5.ref_frame1.post_tx_power_index=0xff
+ant0.ch5.ref_frame2.post_tx_power_index=0xff
+ant0.ch5.ref_frame3.post_tx_power_index=0xff
+ant0.ch5.ref_frame4.post_tx_power_index=0xff
+ant0.ch5.ref_frame5.post_tx_power_index=0xff
+ant0.ch5.ref_frame6.post_tx_power_index=0xff
+ant0.ch5.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant0.ch5.ref_frame0.pg_delay=0x34
+ant0.ch5.ref_frame1.pg_delay=0x34
+ant0.ch5.ref_frame2.pg_delay=0x34
+ant0.ch5.ref_frame3.pg_delay=0x34
+ant0.ch5.ref_frame4.pg_delay=0x34
+ant0.ch5.ref_frame5.pg_delay=0x34
+ant0.ch5.ref_frame6.pg_delay=0x34
+ant0.ch5.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant0.ch5.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+# ANT0 CH9 CONFIGURATION
+#3B3B3B3B FF 0x34 0xFFFFFFFF
+#3C3C3C3C FF 0x34 0xFFFFFFFF
+#3A423A3A FF 0x34 0xFFFFFFFF
+#36363636 FF 0x34 0xFFFFFFFF
+#32323232 FF 0x34 0xFFFFFFFF
+#31313131 FF 0x34 0xFFFFFFFF
+#37373737 FF 0x34 0xFFFFFFFF
+
+# tx power
+ant0.ch9.ref_frame0.tx_power_index=3B:3B:3B:3B
+ant0.ch9.ref_frame1.tx_power_index=3C:3C:3C:3C
+ant0.ch9.ref_frame2.tx_power_index=3A:3A:42:3A
+ant0.ch9.ref_frame3.tx_power_index=36:36:36:36
+ant0.ch9.ref_frame4.tx_power_index=32:32:32:32
+ant0.ch9.ref_frame5.tx_power_index=31:31:31:31
+ant0.ch9.ref_frame6.tx_power_index=37:37:37:37
+ant0.ch9.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant0.ch9.ref_frame0.post_tx_power_index=0xff
+ant0.ch9.ref_frame1.post_tx_power_index=0xff
+ant0.ch9.ref_frame2.post_tx_power_index=0xff
+ant0.ch9.ref_frame3.post_tx_power_index=0xff
+ant0.ch9.ref_frame4.post_tx_power_index=0xff
+ant0.ch9.ref_frame5.post_tx_power_index=0xff
+ant0.ch9.ref_frame6.post_tx_power_index=0xff
+ant0.ch9.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant0.ch9.ref_frame0.pg_delay=0x34
+ant0.ch9.ref_frame1.pg_delay=0x34
+ant0.ch9.ref_frame2.pg_delay=0x34
+ant0.ch9.ref_frame3.pg_delay=0x34
+ant0.ch9.ref_frame4.pg_delay=0x34
+ant0.ch9.ref_frame5.pg_delay=0x34
+ant0.ch9.ref_frame6.pg_delay=0x34
+ant0.ch9.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant0.ch9.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+# ANT1 CH9 CONFIGURATION
+#41414141 FF 0x34 0xFFFFFFFF
+#45454545 FF 0x34 0xFFFFFFFF
+#3E463E3E FF 0x34 0xFFFFFFFF
+#37373737 FF 0x34 0xFFFFFFFF
+#40404040 FF 0x34 0xFFFFFFFF
+#3B3B3B3B FF 0x34 0xFFFFFFFF
+#39393939 FF 0x34 0xFFFFFFFF
+
+# tx power
+ant1.ch9.ref_frame0.tx_power_index=41:41:41:41
+ant1.ch9.ref_frame1.tx_power_index=45:45:45:45
+ant1.ch9.ref_frame2.tx_power_index=3E:3E:46:3E
+ant1.ch9.ref_frame3.tx_power_index=37:37:37:37
+ant1.ch9.ref_frame4.tx_power_index=40:40:40:40
+ant1.ch9.ref_frame5.tx_power_index=3B:3B:3B:3B
+ant1.ch9.ref_frame6.tx_power_index=39:39:39:39
+ant1.ch9.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant1.ch9.ref_frame0.post_tx_power_index=0xff
+ant1.ch9.ref_frame1.post_tx_power_index=0xff
+ant1.ch9.ref_frame2.post_tx_power_index=0xff
+ant1.ch9.ref_frame3.post_tx_power_index=0xff
+ant1.ch9.ref_frame4.post_tx_power_index=0xff
+ant1.ch9.ref_frame5.post_tx_power_index=0xff
+ant1.ch9.ref_frame6.post_tx_power_index=0xff
+ant1.ch9.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant1.ch9.ref_frame0.pg_delay=0x34
+ant1.ch9.ref_frame1.pg_delay=0x34
+ant1.ch9.ref_frame2.pg_delay=0x34
+ant1.ch9.ref_frame3.pg_delay=0x34
+ant1.ch9.ref_frame4.pg_delay=0x34
+ant1.ch9.ref_frame5.pg_delay=0x34
+ant1.ch9.ref_frame6.pg_delay=0x34
+ant1.ch9.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant1.ch9.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+restricted_channels=0x0000
+alternate_pulse_shape=0x00
diff --git a/uwb/calibration-FCC.conf b/uwb/calibration-FCC.conf
new file mode 100644
index 0000000..f579c20
--- /dev/null
+++ b/uwb/calibration-FCC.conf
@@ -0,0 +1,151 @@
+# FCC calibration file
+
+# ANT0 CH5 configuration
+#41414141 34 0x34 0xFFFFFFFF
+#48484848 33 0x34 0xFFFFFFFF
+#3C443C3C 36 0x34 0xFFFFFFFF
+#33333333 33 0x34 0xFFFFFFFF
+#3E3E3E3E 32 0x34 0xFFFFFFFF
+#3B3B3B3B 32 0x34 0xFFFFFFFF
+#32323232 32 0x34 0xFFFFFFFF
+
+# tx power
+ant0.ch5.ref_frame0.tx_power_index=41:41:41:41
+ant0.ch5.ref_frame1.tx_power_index=48:48:48:48
+ant0.ch5.ref_frame2.tx_power_index=3C:3C:44:3C
+ant0.ch5.ref_frame3.tx_power_index=33:33:33:33
+ant0.ch5.ref_frame4.tx_power_index=3E:3E:3E:3E
+ant0.ch5.ref_frame5.tx_power_index=3B:3B:3B:3B
+ant0.ch5.ref_frame6.tx_power_index=32:32:32:32
+ant0.ch5.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant0.ch5.ref_frame0.post_tx_power_index=0x34
+ant0.ch5.ref_frame1.post_tx_power_index=0x33
+ant0.ch5.ref_frame2.post_tx_power_index=0x36
+ant0.ch5.ref_frame3.post_tx_power_index=0x33
+ant0.ch5.ref_frame4.post_tx_power_index=0x32
+ant0.ch5.ref_frame5.post_tx_power_index=0x32
+ant0.ch5.ref_frame6.post_tx_power_index=0x32
+ant0.ch5.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant0.ch5.ref_frame0.pg_delay=0x34
+ant0.ch5.ref_frame1.pg_delay=0x34
+ant0.ch5.ref_frame2.pg_delay=0x34
+ant0.ch5.ref_frame3.pg_delay=0x34
+ant0.ch5.ref_frame4.pg_delay=0x34
+ant0.ch5.ref_frame5.pg_delay=0x34
+ant0.ch5.ref_frame6.pg_delay=0x34
+ant0.ch5.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant0.ch5.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+# ANT0 CH9 CONFIGURATION
+#45454545 32 0x34 0xFFFFFFFF
+#45454545 32 0x34 0xFFFFFFFF
+#3F473F3F 32 0x34 0xFFFFFFFF
+#3B3B3B3B 32 0x34 0xFFFFFFFF
+#3E3E3E3E 32 0x34 0xFFFFFFFF
+#37373737 32 0x34 0xFFFFFFFF
+#39393939 32 0x34 0xFFFFFFFF
+
+# tx power
+ant0.ch9.ref_frame0.tx_power_index=45:45:45:45
+ant0.ch9.ref_frame1.tx_power_index=45:45:45:45
+ant0.ch9.ref_frame2.tx_power_index=3F:3F:47:3F
+ant0.ch9.ref_frame3.tx_power_index=3B:3B:3B:3B
+ant0.ch9.ref_frame4.tx_power_index=3E:3E:3E:3E
+ant0.ch9.ref_frame5.tx_power_index=37:37:37:37
+ant0.ch9.ref_frame6.tx_power_index=39:39:39:39
+ant0.ch9.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant0.ch9.ref_frame0.post_tx_power_index=0x32
+ant0.ch9.ref_frame1.post_tx_power_index=0x32
+ant0.ch9.ref_frame2.post_tx_power_index=0x32
+ant0.ch9.ref_frame3.post_tx_power_index=0x32
+ant0.ch9.ref_frame4.post_tx_power_index=0x32
+ant0.ch9.ref_frame5.post_tx_power_index=0x32
+ant0.ch9.ref_frame6.post_tx_power_index=0x32
+ant0.ch9.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant0.ch9.ref_frame0.pg_delay=0x34
+ant0.ch9.ref_frame1.pg_delay=0x34
+ant0.ch9.ref_frame2.pg_delay=0x34
+ant0.ch9.ref_frame3.pg_delay=0x34
+ant0.ch9.ref_frame4.pg_delay=0x34
+ant0.ch9.ref_frame5.pg_delay=0x34
+ant0.ch9.ref_frame6.pg_delay=0x34
+ant0.ch9.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant0.ch9.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+# ANT1 CH9 CONFIGURATION
+#44444444 32 0x34 0xFFFFFFFF
+#4B4B4B4B 32 0x34 0xFFFFFFFF
+#41494141 32 0x34 0xFFFFFFFF
+#3A3A3A3A 32 0x34 0xFFFFFFFF
+#40404040 32 0x34 0xFFFFFFFF
+#3E3E3E3E 32 0x34 0xFFFFFFFF
+#34343434 32 0x34 0xFFFFFFFF
+
+# tx power
+ant1.ch9.ref_frame0.tx_power_index=44:44:44:44
+ant1.ch9.ref_frame1.tx_power_index=4B:4B:4B:4B
+ant1.ch9.ref_frame2.tx_power_index=41:41:49:41
+ant1.ch9.ref_frame3.tx_power_index=3A:3A:3A:3A
+ant1.ch9.ref_frame4.tx_power_index=40:40:40:40
+ant1.ch9.ref_frame5.tx_power_index=3E:3E:3E:3E
+ant1.ch9.ref_frame6.tx_power_index=34:34:34:34
+ant1.ch9.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant1.ch9.ref_frame0.post_tx_power_index=0x32
+ant1.ch9.ref_frame1.post_tx_power_index=0x32
+ant1.ch9.ref_frame2.post_tx_power_index=0x32
+ant1.ch9.ref_frame3.post_tx_power_index=0x32
+ant1.ch9.ref_frame4.post_tx_power_index=0x32
+ant1.ch9.ref_frame5.post_tx_power_index=0x32
+ant1.ch9.ref_frame6.post_tx_power_index=0x32
+ant1.ch9.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant1.ch9.ref_frame0.pg_delay=0x34
+ant1.ch9.ref_frame1.pg_delay=0x34
+ant1.ch9.ref_frame2.pg_delay=0x34
+ant1.ch9.ref_frame3.pg_delay=0x34
+ant1.ch9.ref_frame4.pg_delay=0x34
+ant1.ch9.ref_frame5.pg_delay=0x34
+ant1.ch9.ref_frame6.pg_delay=0x34
+ant1.ch9.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant1.ch9.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+restricted_channels=0x0000
+alternate_pulse_shape=0x00
diff --git a/uwb/calibration-JP.conf b/uwb/calibration-JP.conf
new file mode 100644
index 0000000..463dada
--- /dev/null
+++ b/uwb/calibration-JP.conf
@@ -0,0 +1,101 @@
+# JP calibration file
+# ANT0 CH9 CONFIGURATION
+#41414141 FF 29 0xFFFFFFFF
+#4C4C4C4C FF 29 0xFFFFFFFF
+#3C463C3C FF 29 0xFFFFFFFF
+#32323232 FF 29 0xFFFFFFFF
+#41414141 FF 29 0xFFFFFFFF
+#40404040 FF 29 0xFFFFFFFF
+#35353535 FF 29 0xFFFFFFFF
+
+# tx power
+ant0.ch9.ref_frame0.tx_power_index=41:41:41:41
+ant0.ch9.ref_frame1.tx_power_index=4C:4C:4C:4C
+ant0.ch9.ref_frame2.tx_power_index=3C:3C:46:3C
+ant0.ch9.ref_frame3.tx_power_index=32:32:32:32
+ant0.ch9.ref_frame4.tx_power_index=41:41:41:41
+ant0.ch9.ref_frame5.tx_power_index=40:40:40:40
+ant0.ch9.ref_frame6.tx_power_index=35:35:35:35
+ant0.ch9.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant0.ch9.ref_frame0.post_tx_power_index=0xff
+ant0.ch9.ref_frame1.post_tx_power_index=0xff
+ant0.ch9.ref_frame2.post_tx_power_index=0xff
+ant0.ch9.ref_frame3.post_tx_power_index=0xff
+ant0.ch9.ref_frame4.post_tx_power_index=0xff
+ant0.ch9.ref_frame5.post_tx_power_index=0xff
+ant0.ch9.ref_frame6.post_tx_power_index=0xff
+ant0.ch9.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant0.ch9.ref_frame0.pg_delay=0x29
+ant0.ch9.ref_frame1.pg_delay=0x29
+ant0.ch9.ref_frame2.pg_delay=0x29
+ant0.ch9.ref_frame3.pg_delay=0x29
+ant0.ch9.ref_frame4.pg_delay=0x29
+ant0.ch9.ref_frame5.pg_delay=0x29
+ant0.ch9.ref_frame6.pg_delay=0x29
+ant0.ch9.ref_frame7.pg_delay=0x29
+
+# max gating gain
+ant0.ch9.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+# ANT1 CH9 CONFIGURATION
+#43434343 FF 28 0xFFFFFFFF
+#47474747 FF 27 0xFFFFFFFF
+#3E483E3E FF 28 0xFFFFFFFF
+#34343434 FF 28 0xFFFFFFFF
+#3C3C3C3C FF 27 0xFFFFFFFF
+#3B3B3B3B FF 27 0xFFFFFFFF
+#30303030 FF 27 0xFFFFFFFF
+
+# tx power
+ant1.ch9.ref_frame0.tx_power_index=43:43:43:43
+ant1.ch9.ref_frame1.tx_power_index=47:47:47:47
+ant1.ch9.ref_frame2.tx_power_index=3E:3E:48:3E
+ant1.ch9.ref_frame3.tx_power_index=34:34:34:34
+ant1.ch9.ref_frame4.tx_power_index=3C:3C:3C:3C
+ant1.ch9.ref_frame5.tx_power_index=3B:3B:3B:3B
+ant1.ch9.ref_frame6.tx_power_index=30:30:30:30
+ant1.ch9.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant1.ch9.ref_frame0.post_tx_power_index=0xff
+ant1.ch9.ref_frame1.post_tx_power_index=0xff
+ant1.ch9.ref_frame2.post_tx_power_index=0xff
+ant1.ch9.ref_frame3.post_tx_power_index=0xff
+ant1.ch9.ref_frame4.post_tx_power_index=0xff
+ant1.ch9.ref_frame5.post_tx_power_index=0xff
+ant1.ch9.ref_frame6.post_tx_power_index=0xff
+ant1.ch9.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant1.ch9.ref_frame0.pg_delay=0x28
+ant1.ch9.ref_frame1.pg_delay=0x27
+ant1.ch9.ref_frame2.pg_delay=0x28
+ant1.ch9.ref_frame3.pg_delay=0x28
+ant1.ch9.ref_frame4.pg_delay=0x27
+ant1.ch9.ref_frame5.pg_delay=0x27
+ant1.ch9.ref_frame6.pg_delay=0x27
+ant1.ch9.ref_frame7.pg_delay=0x27
+
+# max gating gain
+ant1.ch9.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+restricted_channels=0x0020
+alternate_pulse_shape=0x01
diff --git a/uwb/calibration-RESTRICTED.conf b/uwb/calibration-RESTRICTED.conf
new file mode 100644
index 0000000..64363e5
--- /dev/null
+++ b/uwb/calibration-RESTRICTED.conf
@@ -0,0 +1,3 @@
+# RESTRICTED calibration file, UWB disabled
+
+restricted_channels=0xFFFF
diff --git a/uwb/calibration-TW.conf b/uwb/calibration-TW.conf
new file mode 100644
index 0000000..fcac264
--- /dev/null
+++ b/uwb/calibration-TW.conf
@@ -0,0 +1,151 @@
+# TW calibration file (FCC w Ch5 disabled)
+
+# ANT0 CH5 configuration
+#41414141 34 0x34 0xFFFFFFFF
+#48484848 33 0x34 0xFFFFFFFF
+#3C443C3C 36 0x34 0xFFFFFFFF
+#33333333 33 0x34 0xFFFFFFFF
+#3E3E3E3E 32 0x34 0xFFFFFFFF
+#3B3B3B3B 32 0x34 0xFFFFFFFF
+#32323232 32 0x34 0xFFFFFFFF
+
+# tx power
+ant0.ch5.ref_frame0.tx_power_index=41:41:41:41
+ant0.ch5.ref_frame1.tx_power_index=48:48:48:48
+ant0.ch5.ref_frame2.tx_power_index=3C:3C:44:3C
+ant0.ch5.ref_frame3.tx_power_index=33:33:33:33
+ant0.ch5.ref_frame4.tx_power_index=3E:3E:3E:3E
+ant0.ch5.ref_frame5.tx_power_index=3B:3B:3B:3B
+ant0.ch5.ref_frame6.tx_power_index=32:32:32:32
+ant0.ch5.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant0.ch5.ref_frame0.post_tx_power_index=0x34
+ant0.ch5.ref_frame1.post_tx_power_index=0x33
+ant0.ch5.ref_frame2.post_tx_power_index=0x36
+ant0.ch5.ref_frame3.post_tx_power_index=0x33
+ant0.ch5.ref_frame4.post_tx_power_index=0x32
+ant0.ch5.ref_frame5.post_tx_power_index=0x32
+ant0.ch5.ref_frame6.post_tx_power_index=0x32
+ant0.ch5.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant0.ch5.ref_frame0.pg_delay=0x34
+ant0.ch5.ref_frame1.pg_delay=0x34
+ant0.ch5.ref_frame2.pg_delay=0x34
+ant0.ch5.ref_frame3.pg_delay=0x34
+ant0.ch5.ref_frame4.pg_delay=0x34
+ant0.ch5.ref_frame5.pg_delay=0x34
+ant0.ch5.ref_frame6.pg_delay=0x34
+ant0.ch5.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant0.ch5.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+# ANT0 CH9 CONFIGURATION
+#45454545 32 0x34 0xFFFFFFFF
+#45454545 32 0x34 0xFFFFFFFF
+#3F473F3F 32 0x34 0xFFFFFFFF
+#3B3B3B3B 32 0x34 0xFFFFFFFF
+#3E3E3E3E 32 0x34 0xFFFFFFFF
+#37373737 32 0x34 0xFFFFFFFF
+#39393939 32 0x34 0xFFFFFFFF
+
+# tx power
+ant0.ch9.ref_frame0.tx_power_index=45:45:45:45
+ant0.ch9.ref_frame1.tx_power_index=45:45:45:45
+ant0.ch9.ref_frame2.tx_power_index=3F:3F:47:3F
+ant0.ch9.ref_frame3.tx_power_index=3B:3B:3B:3B
+ant0.ch9.ref_frame4.tx_power_index=3E:3E:3E:3E
+ant0.ch9.ref_frame5.tx_power_index=37:37:37:37
+ant0.ch9.ref_frame6.tx_power_index=39:39:39:39
+ant0.ch9.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant0.ch9.ref_frame0.post_tx_power_index=0x32
+ant0.ch9.ref_frame1.post_tx_power_index=0x32
+ant0.ch9.ref_frame2.post_tx_power_index=0x32
+ant0.ch9.ref_frame3.post_tx_power_index=0x32
+ant0.ch9.ref_frame4.post_tx_power_index=0x32
+ant0.ch9.ref_frame5.post_tx_power_index=0x32
+ant0.ch9.ref_frame6.post_tx_power_index=0x32
+ant0.ch9.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant0.ch9.ref_frame0.pg_delay=0x34
+ant0.ch9.ref_frame1.pg_delay=0x34
+ant0.ch9.ref_frame2.pg_delay=0x34
+ant0.ch9.ref_frame3.pg_delay=0x34
+ant0.ch9.ref_frame4.pg_delay=0x34
+ant0.ch9.ref_frame5.pg_delay=0x34
+ant0.ch9.ref_frame6.pg_delay=0x34
+ant0.ch9.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant0.ch9.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+# ANT1 CH9 CONFIGURATION
+#44444444 32 0x34 0xFFFFFFFF
+#4B4B4B4B 32 0x34 0xFFFFFFFF
+#41494141 32 0x34 0xFFFFFFFF
+#3A3A3A3A 32 0x34 0xFFFFFFFF
+#40404040 32 0x34 0xFFFFFFFF
+#3E3E3E3E 32 0x34 0xFFFFFFFF
+#34343434 32 0x34 0xFFFFFFFF
+
+# tx power
+ant1.ch9.ref_frame0.tx_power_index=44:44:44:44
+ant1.ch9.ref_frame1.tx_power_index=4B:4B:4B:4B
+ant1.ch9.ref_frame2.tx_power_index=41:41:49:41
+ant1.ch9.ref_frame3.tx_power_index=3A:3A:3A:3A
+ant1.ch9.ref_frame4.tx_power_index=40:40:40:40
+ant1.ch9.ref_frame5.tx_power_index=3E:3E:3E:3E
+ant1.ch9.ref_frame6.tx_power_index=34:34:34:34
+ant1.ch9.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant1.ch9.ref_frame0.post_tx_power_index=0x32
+ant1.ch9.ref_frame1.post_tx_power_index=0x32
+ant1.ch9.ref_frame2.post_tx_power_index=0x32
+ant1.ch9.ref_frame3.post_tx_power_index=0x32
+ant1.ch9.ref_frame4.post_tx_power_index=0x32
+ant1.ch9.ref_frame5.post_tx_power_index=0x32
+ant1.ch9.ref_frame6.post_tx_power_index=0x32
+ant1.ch9.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant1.ch9.ref_frame0.pg_delay=0x34
+ant1.ch9.ref_frame1.pg_delay=0x34
+ant1.ch9.ref_frame2.pg_delay=0x34
+ant1.ch9.ref_frame3.pg_delay=0x34
+ant1.ch9.ref_frame4.pg_delay=0x34
+ant1.ch9.ref_frame5.pg_delay=0x34
+ant1.ch9.ref_frame6.pg_delay=0x34
+ant1.ch9.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant1.ch9.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+restricted_channels=0x0020
+alternate_pulse_shape=0x00
diff --git a/uwb/calibration-default.conf b/uwb/calibration-default.conf
new file mode 100644
index 0000000..f579c20
--- /dev/null
+++ b/uwb/calibration-default.conf
@@ -0,0 +1,151 @@
+# FCC calibration file
+
+# ANT0 CH5 configuration
+#41414141 34 0x34 0xFFFFFFFF
+#48484848 33 0x34 0xFFFFFFFF
+#3C443C3C 36 0x34 0xFFFFFFFF
+#33333333 33 0x34 0xFFFFFFFF
+#3E3E3E3E 32 0x34 0xFFFFFFFF
+#3B3B3B3B 32 0x34 0xFFFFFFFF
+#32323232 32 0x34 0xFFFFFFFF
+
+# tx power
+ant0.ch5.ref_frame0.tx_power_index=41:41:41:41
+ant0.ch5.ref_frame1.tx_power_index=48:48:48:48
+ant0.ch5.ref_frame2.tx_power_index=3C:3C:44:3C
+ant0.ch5.ref_frame3.tx_power_index=33:33:33:33
+ant0.ch5.ref_frame4.tx_power_index=3E:3E:3E:3E
+ant0.ch5.ref_frame5.tx_power_index=3B:3B:3B:3B
+ant0.ch5.ref_frame6.tx_power_index=32:32:32:32
+ant0.ch5.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant0.ch5.ref_frame0.post_tx_power_index=0x34
+ant0.ch5.ref_frame1.post_tx_power_index=0x33
+ant0.ch5.ref_frame2.post_tx_power_index=0x36
+ant0.ch5.ref_frame3.post_tx_power_index=0x33
+ant0.ch5.ref_frame4.post_tx_power_index=0x32
+ant0.ch5.ref_frame5.post_tx_power_index=0x32
+ant0.ch5.ref_frame6.post_tx_power_index=0x32
+ant0.ch5.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant0.ch5.ref_frame0.pg_delay=0x34
+ant0.ch5.ref_frame1.pg_delay=0x34
+ant0.ch5.ref_frame2.pg_delay=0x34
+ant0.ch5.ref_frame3.pg_delay=0x34
+ant0.ch5.ref_frame4.pg_delay=0x34
+ant0.ch5.ref_frame5.pg_delay=0x34
+ant0.ch5.ref_frame6.pg_delay=0x34
+ant0.ch5.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant0.ch5.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant0.ch5.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+# ANT0 CH9 CONFIGURATION
+#45454545 32 0x34 0xFFFFFFFF
+#45454545 32 0x34 0xFFFFFFFF
+#3F473F3F 32 0x34 0xFFFFFFFF
+#3B3B3B3B 32 0x34 0xFFFFFFFF
+#3E3E3E3E 32 0x34 0xFFFFFFFF
+#37373737 32 0x34 0xFFFFFFFF
+#39393939 32 0x34 0xFFFFFFFF
+
+# tx power
+ant0.ch9.ref_frame0.tx_power_index=45:45:45:45
+ant0.ch9.ref_frame1.tx_power_index=45:45:45:45
+ant0.ch9.ref_frame2.tx_power_index=3F:3F:47:3F
+ant0.ch9.ref_frame3.tx_power_index=3B:3B:3B:3B
+ant0.ch9.ref_frame4.tx_power_index=3E:3E:3E:3E
+ant0.ch9.ref_frame5.tx_power_index=37:37:37:37
+ant0.ch9.ref_frame6.tx_power_index=39:39:39:39
+ant0.ch9.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant0.ch9.ref_frame0.post_tx_power_index=0x32
+ant0.ch9.ref_frame1.post_tx_power_index=0x32
+ant0.ch9.ref_frame2.post_tx_power_index=0x32
+ant0.ch9.ref_frame3.post_tx_power_index=0x32
+ant0.ch9.ref_frame4.post_tx_power_index=0x32
+ant0.ch9.ref_frame5.post_tx_power_index=0x32
+ant0.ch9.ref_frame6.post_tx_power_index=0x32
+ant0.ch9.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant0.ch9.ref_frame0.pg_delay=0x34
+ant0.ch9.ref_frame1.pg_delay=0x34
+ant0.ch9.ref_frame2.pg_delay=0x34
+ant0.ch9.ref_frame3.pg_delay=0x34
+ant0.ch9.ref_frame4.pg_delay=0x34
+ant0.ch9.ref_frame5.pg_delay=0x34
+ant0.ch9.ref_frame6.pg_delay=0x34
+ant0.ch9.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant0.ch9.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant0.ch9.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+# ANT1 CH9 CONFIGURATION
+#44444444 32 0x34 0xFFFFFFFF
+#4B4B4B4B 32 0x34 0xFFFFFFFF
+#41494141 32 0x34 0xFFFFFFFF
+#3A3A3A3A 32 0x34 0xFFFFFFFF
+#40404040 32 0x34 0xFFFFFFFF
+#3E3E3E3E 32 0x34 0xFFFFFFFF
+#34343434 32 0x34 0xFFFFFFFF
+
+# tx power
+ant1.ch9.ref_frame0.tx_power_index=44:44:44:44
+ant1.ch9.ref_frame1.tx_power_index=4B:4B:4B:4B
+ant1.ch9.ref_frame2.tx_power_index=41:41:49:41
+ant1.ch9.ref_frame3.tx_power_index=3A:3A:3A:3A
+ant1.ch9.ref_frame4.tx_power_index=40:40:40:40
+ant1.ch9.ref_frame5.tx_power_index=3E:3E:3E:3E
+ant1.ch9.ref_frame6.tx_power_index=34:34:34:34
+ant1.ch9.ref_frame7.tx_power_index=FF:FF:FF:FF
+
+# pp cw tx pwr
+ant1.ch9.ref_frame0.post_tx_power_index=0x32
+ant1.ch9.ref_frame1.post_tx_power_index=0x32
+ant1.ch9.ref_frame2.post_tx_power_index=0x32
+ant1.ch9.ref_frame3.post_tx_power_index=0x32
+ant1.ch9.ref_frame4.post_tx_power_index=0x32
+ant1.ch9.ref_frame5.post_tx_power_index=0x32
+ant1.ch9.ref_frame6.post_tx_power_index=0x32
+ant1.ch9.ref_frame7.post_tx_power_index=0xff
+
+# pg delay
+ant1.ch9.ref_frame0.pg_delay=0x34
+ant1.ch9.ref_frame1.pg_delay=0x34
+ant1.ch9.ref_frame2.pg_delay=0x34
+ant1.ch9.ref_frame3.pg_delay=0x34
+ant1.ch9.ref_frame4.pg_delay=0x34
+ant1.ch9.ref_frame5.pg_delay=0x34
+ant1.ch9.ref_frame6.pg_delay=0x34
+ant1.ch9.ref_frame7.pg_delay=0x34
+
+# max gating gain
+ant1.ch9.ref_frame0.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame1.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame2.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame3.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame4.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame5.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame6.max_gating_gain=0xFFFFFFFF
+ant1.ch9.ref_frame7.max_gating_gain=0xFFFFFFFF
+
+restricted_channels=0x0000
+alternate_pulse_shape=0x00
diff --git a/uwb/calibration.conf b/uwb/calibration.conf
new file mode 100644
index 0000000..a985e8a
--- /dev/null
+++ b/uwb/calibration.conf
@@ -0,0 +1,39 @@
+# common calibration file
+ant0.ch5.ant_delay=37:40:00:00
+ant0.ch9.ant_delay=37:40:00:00
+
+ant1.ch5.ant_delay=3a:40:00:00
+ant1.ch9.ant_delay=3a:40:00:00
+
+ant2.ch5.ant_delay=38:40:00:00
+ant2.ch9.ant_delay=38:40:00:00
+
+ant3.ch5.ant_delay=38:40:00:00
+ant3.ch9.ant_delay=38:40:00:00
+
+ant_grp1.ch9.pdoa.axisx.offset=e2:0c
+ant_grp1.ch9.pdoa.axisy.offset=00:00
+
+ant_grp2.ch9.pdoa.axisx.offset=00:00
+ant_grp2.ch9.pdoa.axisy.offset=7f:10
+
+xtal_trim=0x30
+
+# signed in 2s complement FF -> -0.25 dB
+ant0.ch5.pa_gain_offset=0x00
+ant0.ch9.pa_gain_offset=0x00
+
+ant1.ch5.pa_gain_offset=0x00
+ant1.ch9.pa_gain_offset=0x00
+
+ant2.ch5.pa_gain_offset=0x00
+ant2.ch9.pa_gain_offset=0x00
+
+ant3.ch5.pa_gain_offset=0x00
+ant3.ch9.pa_gain_offset=0x00
+
+#Coex
+wifi_coex_mode=01
+wifi_coex_time_gap_t1=01
+ch5.wifi_coex_enabled=01
+ch9.wifi_coex_enabled=01
diff --git a/uwb/configuration.conf b/uwb/configuration.conf
new file mode 100644
index 0000000..16b9f36
--- /dev/null
+++ b/uwb/configuration.conf
@@ -0,0 +1,122 @@
+[FIRA]ant_sets.ch5.range.rx_ant_set_nonranging = 0
+[FIRA]ant_sets.ch5.range.rx_ant_set_ranging = 0
+[FIRA]ant_sets.ch5.range.tx_ant_set_nonranging = 0
+[FIRA]ant_sets.ch5.range.tx_ant_set_ranging = 0
+[FIRA]ant_sets.ch9.range.rx_ant_set_nonranging = 0
+[FIRA]ant_sets.ch9.range.rx_ant_set_ranging = 0
+[FIRA]ant_sets.ch9.range.tx_ant_set_nonranging = 0
+[FIRA]ant_sets.ch9.range.tx_ant_set_ranging = 0
+[FIRA]ant_sets.ch9.azimuth.rx_ant_set_nonranging = 1
+[FIRA]ant_sets.ch9.azimuth.rx_ant_set_ranging = 1
+[FIRA]ant_sets.ch9.azimuth.tx_ant_set_nonranging = 1
+[FIRA]ant_sets.ch9.azimuth.tx_ant_set_ranging = 1
+[FIRA]ant_sets.ch9.elevation.rx_ant_set_nonranging = 2
+[FIRA]ant_sets.ch9.elevation.rx_ant_set_ranging = 2
+[FIRA]ant_sets.ch9.elevation.tx_ant_set_nonranging = 2
+[FIRA]ant_sets.ch9.elevation.tx_ant_set_ranging = 2
+[FIRA]ant_sets.ch9.azimuth_elevation.rx_ant_set_nonranging = 1
+[FIRA]ant_sets.ch9.azimuth_elevation.rx_ant_set_ranging_azimuth = 1
+[FIRA]ant_sets.ch9.azimuth_elevation.rx_ant_set_ranging_elevation = 2
+[FIRA]ant_sets.ch9.azimuth_elevation.tx_ant_set_nonranging = 1
+[FIRA]ant_sets.ch9.azimuth_elevation.tx_ant_set_ranging = 1
+
+[CCC]ant_sets.ch5.range.rx_ant_set_nonranging = 0
+[CCC]ant_sets.ch5.range.rx_ant_set_ranging = 0
+[CCC]ant_sets.ch5.range.tx_ant_set_nonranging = 0
+[CCC]ant_sets.ch5.range.tx_ant_set_ranging = 0
+[CCC]ant_sets.ch9.range.rx_ant_set_nonranging = 0
+[CCC]ant_sets.ch9.range.rx_ant_set_ranging = 0
+[CCC]ant_sets.ch9.range.tx_ant_set_nonranging = 0
+[CCC]ant_sets.ch9.range.tx_ant_set_ranging = 0
+
+# Antenna Configuration
+ant0.config=01
+ant1.config=02
+ant2.config=03
+ant3.config=04
+
+# Ranging
+ant_grp0.rf_config.rfoff=00
+ant_grp0.rf_config.tx=02
+ant_grp0.rf_config.tx_aoa=02
+ant_grp0.rf_config.rx_ip=04
+ant_grp0.rf_config.rx_sts0=04
+ant_grp0.rf_config.rx_sts1=04
+ant_grp0.rf_config.rx_sts2=04
+ant_grp0.rf_config.rx_sts3=04
+ant_grp0.lna_rxa=00
+ant_grp0.lna_rxb=01
+ant_grp0.rx_config=01
+ant_grp0.pdoa_segments=00:00:00:00:00:00
+ant_grp0.tx_power_control=01
+
+# PDoA Azimuth
+ant_grp1.rf_config.rfoff=00
+ant_grp1.rf_config.tx=03
+ant_grp1.rf_config.tx_aoa=03
+ant_grp1.rf_config.rx_ip=0e
+ant_grp1.rf_config.rx_sts0=0e
+ant_grp1.rf_config.rx_sts1=0e
+ant_grp1.rf_config.rx_sts2=0e
+ant_grp1.rf_config.rx_sts3=0e
+ant_grp1.lna_rxa=01
+ant_grp1.lna_rxb=01
+ant_grp1.rx_config=04
+ant_grp1.pdoa_segments=07:02:00:00:00:00
+ant_grp1.pdoa_type=00:00:00
+ant_grp1.tx_power_control=01
+ant_grp1.ch9.pdoa.axisx.lut_id=00
+ant_grp1.ch9.pdoa.axisy.lut_id=ff
+
+# PDoA Elevation
+ant_grp2.rf_config.rfoff=00
+ant_grp2.rf_config.tx=03
+ant_grp2.rf_config.tx_aoa=03
+ant_grp2.rf_config.rx_ip=0f
+ant_grp2.rf_config.rx_sts0=0f
+ant_grp2.rf_config.rx_sts1=0f
+ant_grp2.rf_config.rx_sts2=0f
+ant_grp2.rf_config.rx_sts3=0f
+ant_grp2.lna_rxa=01
+ant_grp2.lna_rxb=01
+ant_grp2.rx_config=04
+ant_grp2.pdoa_segments=07:02:00:00:00:00
+ant_grp2.pdoa_type=01:00:00
+ant_grp2.tx_power_control=01
+ant_grp2.ch9.pdoa.axisx.lut_id=ff
+ant_grp2.ch9.pdoa.axisy.lut_id=01
+
+pdoa_lut0.data=29:ee:8f:0c:71:ee:dd:0b:a8:ee:2b:0b:00:ef:77:0a:35:ef:c5:09:c5:ef:12:09:4a:f0:60:08:db:f1:fa:06:cf:f2:48:06:b6:f3:96:05:37:f7:2f:04:91:f8:7d:03:00:fa:cb:02:f8:fc:64:01:62:fe:b2:00:04:00:00:00:d9:01:4e:ff:d5:03:9c:fe:ac:05:e7:fd:87:08:83:fc:a2:09:d1:fb:c5:0a:1d:fb:6d:0d:b8:f9:a8:0e:06:f9:d5:0f:54:f8:7f:11:ee:f6:7d:12:3b:f6:25:13:89:f5:98:13:d5:f4:71:14:23:f4:14:15:71:f3
+pdoa_lut1.data=7b:f0:89:f5:06:f1:3b:f6:87:f2:ee:f6:fe:f3:a0:f7:2d:f5:54:f8:17:f6:06:f9:e1:f6:b8:f9:b2:f7:6a:fa:aa:f8:1d:fb:96:f9:d1:fb:b0:fa:83:fc:f2:fb:35:fd:68:fd:e7:fd:f4:fe:9c:fe:62:00:4e:ff:be:01:00:00:14:03:b2:00:5e:04:64:01:66:05:19:02:8d:06:cb:02:d5:07:7d:03:12:09:2f:04:35:0a:e3:04:44:0b:96:05:6f:0c:48:06:ba:0d:fa:06:9e:0e:ac:07:b2:0f:60:08:a6:10:12:09:6d:11:c5:09:ee:11:77:0a
+
+# Reference frames definition
+ref_frame0.phy_cfg=44:21:07 # BPRF SP1 with 125 bytes
+ref_frame0.payload_size=0x007d
+
+ref_frame1.phy_cfg=45:04:00 # HPRF Set #1 (SP0 with 6.8 Mbps) with 150 bytes
+ref_frame1.payload_size=0x0096
+
+ref_frame2.phy_cfg=44:01:00 # BPRF SP0 with 125 bytes
+ref_frame2.payload_size=0x007d
+
+ref_frame3.phy_cfg=44:22:07 # BPRF SP3
+ref_frame3.payload_size=0x0000
+
+ref_frame4.phy_cfg=25:05:00 # HPRF Set #3 (SP0 with 27.2 Mbps) with 150 bytes
+ref_frame4.payload_size=0x0096
+
+ref_frame5.phy_cfg=45:22:07 # HPRF Set #24 (SP3)
+ref_frame5.payload_size=0x0000
+
+ref_frame6.phy_cfg=25:22:03 # HPRF Set #28 (SP3)
+ref_frame6.payload_size=0x0000
+
+ref_frame7.phy_cfg=25:2d:03 # HPRF DRHM_HR CL7
+ref_frame7.payload_size=0x0C68
+
+# Post tones
+post_tx.pattern_data=DD:DD:DD:DD:77:77:77:77
+post_tx.pattern_repetitions=0x0002
+
+# Ipatov / STS time difference threshold
+ip_sts_sanity_thres_q2=0x48
diff --git a/uwb/uwb_calibration.mk b/uwb/uwb_calibration.mk
index 38e4128..64e2b06 100644
--- a/uwb/uwb_calibration.mk
+++ b/uwb/uwb_calibration.mk
@@ -13,9 +13,13 @@
# See the License for the specific language governing permissions and
# limitations under the License.
-LOCAL_UWB_CAL_DIR=device/google/shusky/uwb
+PRODUCT_PACKAGES += \
+ configuration.conf \
+ calibration.conf \
+ calibration-default.conf \
+ calibration-CE.conf \
+ calibration-FCC.conf \
+ calibration-JP.conf \
+ calibration-TW.conf \
+ calibration-RESTRICTED.conf
-PRODUCT_COPY_FILES += \
- $(LOCAL_UWB_CAL_DIR)/UWB-calibration.conf:$(TARGET_COPY_OUT_VENDOR)/etc/UWB-calibration.conf \
- $(LOCAL_UWB_CAL_DIR)/UWB-calibration.conf:$(TARGET_COPY_OUT_VENDOR)/etc/UWB-calibration-unknown.conf \
- $(LOCAL_UWB_CAL_DIR)/UWB-calibration.conf:$(TARGET_COPY_OUT_VENDOR)/etc/UWB-calibration-default.conf \
