blob: 00dfa6ae726feca19f0b944d9717f982cf2cfec0 [file] [log] [blame]
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL
--- |
define double @test(float %a) {
entry:
%conv = fpext float %a to double
ret double %conv
}
...
---
name: test
alignment: 4
legalized: true
regBankSelected: true
registers:
- { id: 0, class: vecr, preferred-register: '' }
- { id: 1, class: vecr, preferred-register: '' }
liveins:
fixedStack:
stack:
constants:
body: |
bb.1.entry:
liveins: %xmm0
; ALL-LABEL: name: test
; ALL: [[COPY:%[0-9]+]]:fr32 = COPY %xmm0
; ALL: [[CVTSS2SDrr:%[0-9]+]]:fr64 = CVTSS2SDrr [[COPY]]
; ALL: %xmm0 = COPY [[CVTSS2SDrr]]
; ALL: RET 0, implicit %xmm0
%0(s32) = COPY %xmm0
%1(s64) = G_FPEXT %0(s32)
%xmm0 = COPY %1(s64)
RET 0, implicit %xmm0
...